drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c

151

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_420xx/adf_420xx_hw_data.c

286

return GET_HW_DATA(accel_dev)->thd_to_arb_map;

drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c

211

return GET_HW_DATA(accel_dev)->thd_to_arb_map;

drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c

515

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c

622

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c

664

fusectl1 = GET_HW_DATA(accel_dev)->fuses[ADF_FUSECTL1];

drivers/crypto/intel/qat/qat_6xxx/adf_6xxx_hw_data.c

775

return GET_HW_DATA(accel_dev)->thd_to_arb_map;

drivers/crypto/intel/qat/qat_common/adf_accel_devices.h

386

#define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks)

drivers/crypto/intel/qat/qat_common/adf_accel_devices.h

388

GET_HW_DATA(accel_dev)->num_rings_per_bank

drivers/crypto/intel/qat/qat_common/adf_accel_devices.h

390

(((GET_HW_DATA(accel_dev)->ring_to_svc_map) >> (ADF_SRV_TYPE_BIT_LEN * (idx))) \

drivers/crypto/intel/qat/qat_common/adf_accel_devices.h

392

#define GET_ERR_MASK(accel_dev) (&GET_HW_DATA(accel_dev)->dev_err_mask)

drivers/crypto/intel/qat/qat_common/adf_accel_devices.h

393

#define GET_MAX_ACCELENGINES(accel_dev) (GET_HW_DATA(accel_dev)->num_engines)

drivers/crypto/intel/qat/qat_common/adf_accel_devices.h

398

#define GET_TL_DATA(accel_dev) GET_HW_DATA(accel_dev)->tl_data

drivers/crypto/intel/qat/qat_common/adf_admin.c

219

u32 ae_mask = GET_HW_DATA(accel_dev)->ae_mask;

drivers/crypto/intel/qat/qat_common/adf_admin.c

390

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_admin.c

506

u32 ae_mask = GET_HW_DATA(accel_dev)->admin_ae_mask;

drivers/crypto/intel/qat/qat_common/adf_admin.c

529

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_bank_state.c

190

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_bank_state.c

220

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_cfg_services.c

202

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_cfg_services.c

54

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_cnv_dbgfs.c

174

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_fw_counters.c

109

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_fw_counters.c

52

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c

284

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c

344

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.c

412

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_gen4_ras.c

1438

u32 max_rp_num = GET_HW_DATA(accel_dev)->num_banks;

drivers/crypto/intel/qat/qat_common/adf_gen4_ras.c

355

aecorrerr &= GET_HW_DATA(accel_dev)->ae_mask;

drivers/crypto/intel/qat/qat_common/adf_gen4_ras.c

376

aeuncorerr &= GET_HW_DATA(accel_dev)->ae_mask;

drivers/crypto/intel/qat/qat_common/adf_gen4_ras.c

57

u32 ae_mask = GET_HW_DATA(accel_dev)->ae_mask;

drivers/crypto/intel/qat/qat_common/adf_gen6_ras.c

207

ae &= GET_HW_DATA(accel_dev)->ae_mask;

drivers/crypto/intel/qat/qat_common/adf_gen6_ras.c

230

ae &= GET_HW_DATA(accel_dev)->ae_mask;

drivers/crypto/intel/qat/qat_common/adf_gen6_ras.c

30

u32 ae_mask = GET_HW_DATA(accel_dev)->ae_mask;

drivers/crypto/intel/qat/qat_common/adf_gen6_ras.c

639

u32 max_rp_num = GET_HW_DATA(accel_dev)->num_banks;

drivers/crypto/intel/qat/qat_common/adf_init.c

482

if (config && GET_HW_DATA(accel_dev)->dev_config) {

drivers/crypto/intel/qat/qat_common/adf_init.c

483

ret = GET_HW_DATA(accel_dev)->dev_config(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_rl.c

1051

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_rl.c

1086

struct adf_rl_hw_data *rl_hw_data = &GET_HW_DATA(accel_dev)->rl_data;

drivers/crypto/intel/qat/qat_common/adf_rl.c

1088

u16 fw_caps = GET_HW_DATA(accel_dev)->fw_capabilities;

drivers/crypto/intel/qat/qat_common/adf_rl.c

218

u16 rps_per_bundle = GET_HW_DATA(accel_dev)->num_banks_per_vf;

drivers/crypto/intel/qat/qat_common/adf_rl.c

221

u16 rp_id_max = GET_HW_DATA(accel_dev)->num_banks;

drivers/crypto/intel/qat/qat_common/adf_rl.c

266

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_rl.c

282

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_rl.c

296

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_rl.c

482

struct adf_hw_device_data *hw_device = GET_HW_DATA(rl_data->accel_dev);

drivers/crypto/intel/qat/qat_common/adf_rl.c

526

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_rl.c

558

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_sysfs.c

143

hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_sysfs.c

255

hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_telemetry.c

26

u16 fw_caps = GET_HW_DATA(accel_dev)->fw_capabilities;

drivers/crypto/intel/qat/qat_common/adf_tl_debugfs.c

532

struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);

drivers/crypto/intel/qat/qat_common/adf_tl_debugfs.c

577

u32 banks_per_vf = GET_HW_DATA(accel_dev)->num_banks_per_vf;

drivers/crypto/intel/qat/qat_common/qat_algs.c

42

(GET_HW_DATA(accel_dev)->accel_capabilities_mask & \

drivers/crypto/intel/qat/qat_common/qat_crypto.c

120

u16 ring_to_svc_map = GET_HW_DATA(accel_dev)->ring_to_svc_map;

drivers/crypto/intel/qat/qat_common/qat_crypto.c

128

return GET_HW_DATA(accel_dev)->dev_config(accel_dev);