GEN8_GT_IIR
iir = raw_reg_read(regs, GEN8_GT_IIR(0));
raw_reg_write(regs, GEN8_GT_IIR(0), iir);
iir = raw_reg_read(regs, GEN8_GT_IIR(1));
raw_reg_write(regs, GEN8_GT_IIR(1), iir);
iir = raw_reg_read(regs, GEN8_GT_IIR(3));
raw_reg_write(regs, GEN8_GT_IIR(3), iir);
iir = raw_reg_read(regs, GEN8_GT_IIR(2));
raw_reg_write(regs, GEN8_GT_IIR(2), iir);
i915_reg_t reg = GRAPHICS_VER(gt->i915) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR;
pm_iir = intel_uncore_read(uncore, GEN8_GT_IIR(2));
guc_WARN_ON_ONCE(guc, intel_uncore_read(gt->uncore, GEN8_GT_IIR(2)) &
MMIO_DH(GEN8_GT_IIR(0), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);
MMIO_DH(GEN8_GT_IIR(1), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);
MMIO_DH(GEN8_GT_IIR(2), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);
MMIO_DH(GEN8_GT_IIR(3), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);
GEN8_GT_IIR(which))
MMIO_D(GEN8_GT_IIR(0));
MMIO_D(GEN8_GT_IIR(1));
MMIO_D(GEN8_GT_IIR(2));
MMIO_D(GEN8_GT_IIR(3));