GATE_TOP_SCLK_FSYS
GATE_TOP_SCLK_FSYS, 7, CLK_SET_RATE_PARENT, 0),
GATE_TOP_SCLK_FSYS, 8, CLK_SET_RATE_PARENT, 0),
GATE_TOP_SCLK_FSYS, 9, CLK_SET_RATE_PARENT, 0),
GATE_TOP_SCLK_FSYS, 10, CLK_SET_RATE_PARENT, 0),
GATE_TOP_SCLK_FSYS, 0, CLK_SET_RATE_PARENT, 0),
GATE_TOP_SCLK_FSYS, 1, CLK_SET_RATE_PARENT, 0),
GATE_TOP_SCLK_FSYS, 2, CLK_SET_RATE_PARENT, 0),
GATE_TOP_SCLK_FSYS, 7, CLK_SET_RATE_PARENT, 0),
GATE_TOP_SCLK_FSYS, 8, CLK_SET_RATE_PARENT, 0),
GATE_TOP_SCLK_FSYS, 9, CLK_SET_RATE_PARENT, 0),
GATE_TOP_SCLK_FSYS, 10, CLK_SET_RATE_PARENT, 0),
GATE_TOP_SCLK_FSYS,