Symbol: G1_REG_PP_DEV_CONFIG
drivers/media/platform/verisilicon/hantro_postproc.c
40
.max_burst = {G1_REG_PP_DEV_CONFIG, 0, 0x1f},
drivers/media/platform/verisilicon/hantro_postproc.c
41
.clk_gate = {G1_REG_PP_DEV_CONFIG, 1, 0x1},
drivers/media/platform/verisilicon/hantro_postproc.c
42
.out_swap32 = {G1_REG_PP_DEV_CONFIG, 5, 0x1},
drivers/media/platform/verisilicon/hantro_postproc.c
43
.out_endian = {G1_REG_PP_DEV_CONFIG, 6, 0x1},