GATE_IP_PERIL
GATE_IP_PERIL,
GATE(CLK_PWM, "pwm", "div_aclk_100", GATE_IP_PERIL, 24, 0, 0),
GATE(CLK_PCM, "pcm", "div_aclk_100", GATE_IP_PERIL, 23, 0, 0),
GATE(CLK_I2S, "i2s", "div_aclk_100", GATE_IP_PERIL, 21, 0, 0),
GATE(CLK_SPI1, "spi1", "div_aclk_100", GATE_IP_PERIL, 17, 0, 0),
GATE(CLK_SPI0, "spi0", "div_aclk_100", GATE_IP_PERIL, 16, 0, 0),
GATE(CLK_I2C7, "i2c7", "div_aclk_100", GATE_IP_PERIL, 13, 0, 0),
GATE(CLK_I2C6, "i2c6", "div_aclk_100", GATE_IP_PERIL, 12, 0, 0),
GATE(CLK_I2C5, "i2c5", "div_aclk_100", GATE_IP_PERIL, 11, 0, 0),
GATE(CLK_I2C4, "i2c4", "div_aclk_100", GATE_IP_PERIL, 10, 0, 0),
GATE(CLK_I2C3, "i2c3", "div_aclk_100", GATE_IP_PERIL, 9, 0, 0),
GATE(CLK_I2C2, "i2c2", "div_aclk_100", GATE_IP_PERIL, 8, 0, 0),
GATE(CLK_I2C1, "i2c1", "div_aclk_100", GATE_IP_PERIL, 7, 0, 0),
GATE(CLK_I2C0, "i2c0", "div_aclk_100", GATE_IP_PERIL, 6, 0, 0),
GATE(CLK_UART2, "uart2", "div_aclk_100", GATE_IP_PERIL, 2, 0, 0),
GATE(CLK_UART1, "uart1", "div_aclk_100", GATE_IP_PERIL, 1, 0, 0),
GATE(CLK_UART0, "uart0", "div_aclk_100", GATE_IP_PERIL, 0, 0, 0),
GATE_IP_PERIL,
GATE(CLK_SLIMBUS, "slimbus", "aclk100", GATE_IP_PERIL, 25, 0, 0),
GATE(CLK_PWM, "pwm", "aclk100", GATE_IP_PERIL, 24, 0, 0),
GATE(CLK_UART0, "uart0", "aclk100", GATE_IP_PERIL, 0,
GATE(CLK_UART1, "uart1", "aclk100", GATE_IP_PERIL, 1,
GATE(CLK_UART2, "uart2", "aclk100", GATE_IP_PERIL, 2,
GATE(CLK_UART3, "uart3", "aclk100", GATE_IP_PERIL, 3,
GATE(CLK_UART4, "uart4", "aclk100", GATE_IP_PERIL, 4,
GATE(CLK_I2C0, "i2c0", "aclk100", GATE_IP_PERIL, 6,
GATE(CLK_I2C1, "i2c1", "aclk100", GATE_IP_PERIL, 7,
GATE(CLK_I2C2, "i2c2", "aclk100", GATE_IP_PERIL, 8,
GATE(CLK_I2C3, "i2c3", "aclk100", GATE_IP_PERIL, 9,
GATE(CLK_I2C4, "i2c4", "aclk100", GATE_IP_PERIL, 10,
GATE(CLK_I2C5, "i2c5", "aclk100", GATE_IP_PERIL, 11,
GATE(CLK_I2C6, "i2c6", "aclk100", GATE_IP_PERIL, 12,
GATE(CLK_I2C7, "i2c7", "aclk100", GATE_IP_PERIL, 13,
GATE(CLK_I2C_HDMI, "i2c-hdmi", "aclk100", GATE_IP_PERIL, 14,
GATE(CLK_SPI0, "spi0", "aclk100", GATE_IP_PERIL, 16,
GATE(CLK_SPI1, "spi1", "aclk100", GATE_IP_PERIL, 17,
GATE(CLK_SPI2, "spi2", "aclk100", GATE_IP_PERIL, 18,
GATE(CLK_I2S1, "i2s1", "aclk100", GATE_IP_PERIL, 20,
GATE(CLK_I2S2, "i2s2", "aclk100", GATE_IP_PERIL, 21,
GATE(CLK_PCM1, "pcm1", "aclk100", GATE_IP_PERIL, 22,
GATE(CLK_PCM2, "pcm2", "aclk100", GATE_IP_PERIL, 23,
GATE(CLK_SPDIF, "spdif", "aclk100", GATE_IP_PERIL, 26,
GATE(CLK_AC97, "ac97", "aclk100", GATE_IP_PERIL, 27,
GATE(CLK_MODEMIF, "modemif", "aclk100", GATE_IP_PERIL, 28, 0, 0),
GATE(CLK_TSADC, "tsadc", "aclk100", GATE_IP_PERIL, 15,