drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

17

#define G1_REG_RLC_VLC_BASE G1_SWREG(12)

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

18

#define G1_REG_DEC_OUT_BASE G1_SWREG(13)

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

181

vdpu_write_relaxed(vpu, reg, G1_SWREG(2));

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

19

#define G1_REG_REFER0_BASE G1_SWREG(14)

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

194

vdpu_write_relaxed(vpu, reg, G1_SWREG(3));

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

20

#define G1_REG_REFER1_BASE G1_SWREG(15)

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

200

vdpu_write_relaxed(vpu, reg, G1_SWREG(4));

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

208

vdpu_write_relaxed(vpu, reg, G1_SWREG(5));

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

21

#define G1_REG_REFER2_BASE G1_SWREG(16)

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

212

vdpu_write_relaxed(vpu, reg, G1_SWREG(6));

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

22

#define G1_REG_REFER3_BASE G1_SWREG(17)

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

221

vdpu_write_relaxed(vpu, reg, G1_SWREG(18));

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

225

vdpu_write_relaxed(vpu, reg, G1_SWREG(48));

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

228

vdpu_write_relaxed(vpu, reg, G1_SWREG(55));

drivers/media/platform/verisilicon/hantro_g1_mpeg2_dec.c

23

#define G1_REG_QTABLE_BASE G1_SWREG(40)

drivers/media/platform/verisilicon/hantro_g1_regs.h

306

#define G1_REG_PP_INTERRUPT G1_SWREG(60)

drivers/media/platform/verisilicon/hantro_g1_regs.h

312

#define G1_REG_PP_DEV_CONFIG G1_SWREG(61)

drivers/media/platform/verisilicon/hantro_g1_regs.h

322

#define G1_REG_PP_IN_LUMA_BASE G1_SWREG(63)

drivers/media/platform/verisilicon/hantro_g1_regs.h

323

#define G1_REG_PP_IN_CB_BASE G1_SWREG(64)

drivers/media/platform/verisilicon/hantro_g1_regs.h

324

#define G1_REG_PP_IN_CR_BASE G1_SWREG(65)

drivers/media/platform/verisilicon/hantro_g1_regs.h

325

#define G1_REG_PP_OUT_LUMA_BASE G1_SWREG(66)

drivers/media/platform/verisilicon/hantro_g1_regs.h

326

#define G1_REG_PP_OUT_CHROMA_BASE G1_SWREG(67)

drivers/media/platform/verisilicon/hantro_g1_regs.h

327

#define G1_REG_PP_CONTRAST_ADJUST G1_SWREG(68)

drivers/media/platform/verisilicon/hantro_g1_regs.h

328

#define G1_REG_PP_COLOR_CONVERSION G1_SWREG(69)

drivers/media/platform/verisilicon/hantro_g1_regs.h

329

#define G1_REG_PP_COLOR_CONVERSION0 G1_SWREG(70)

drivers/media/platform/verisilicon/hantro_g1_regs.h

330

#define G1_REG_PP_COLOR_CONVERSION1 G1_SWREG(71)

drivers/media/platform/verisilicon/hantro_g1_regs.h

331

#define G1_REG_PP_INPUT_SIZE G1_SWREG(72)

drivers/media/platform/verisilicon/hantro_g1_regs.h

334

#define G1_REG_PP_SCALING0 G1_SWREG(79)

drivers/media/platform/verisilicon/hantro_g1_regs.h

341

#define G1_REG_PP_SCALING1 G1_SWREG(80)

drivers/media/platform/verisilicon/hantro_g1_regs.h

343

#define G1_REG_PP_MASK_R G1_SWREG(82)

drivers/media/platform/verisilicon/hantro_g1_regs.h

344

#define G1_REG_PP_MASK_G G1_SWREG(83)

drivers/media/platform/verisilicon/hantro_g1_regs.h

345

#define G1_REG_PP_MASK_B G1_SWREG(84)

drivers/media/platform/verisilicon/hantro_g1_regs.h

346

#define G1_REG_PP_CONTROL G1_SWREG(85)

drivers/media/platform/verisilicon/hantro_g1_regs.h

351

#define G1_REG_PP_MASK1_ORIG_WIDTH G1_SWREG(88)

drivers/media/platform/verisilicon/hantro_g1_regs.h

353

#define G1_REG_PP_DISPLAY_WIDTH_IN_EXT G1_SWREG(92)

drivers/media/platform/verisilicon/hantro_g1_regs.h

354

#define G1_REG_PP_FUSE G1_SWREG(99)