FZC_ZCP
#define RDC_TBL(TBL,SLOT) (FZC_ZCP + 0x10000UL + \
#define ZCP_CFIG (FZC_ZCP + 0x00000UL)
#define ZCP_INT_STAT (FZC_ZCP + 0x00008UL)
#define ZCP_INT_MASK (FZC_ZCP + 0x00010UL)
#define BAM4BUF (FZC_ZCP + 0x00018UL)
#define BAM8BUF (FZC_ZCP + 0x00020UL)
#define BAM16BUF (FZC_ZCP + 0x00028UL)
#define BAM32BUF (FZC_ZCP + 0x00030UL)
#define DST4BUF (FZC_ZCP + 0x00038UL)
#define DST8BUF (FZC_ZCP + 0x00040UL)
#define DST16BUF (FZC_ZCP + 0x00048UL)
#define DST32BUF (FZC_ZCP + 0x00050UL)
#define ZCP_RAM_DATA0 (FZC_ZCP + 0x00058UL)
#define ZCP_RAM_DATA1 (FZC_ZCP + 0x00060UL)
#define ZCP_RAM_DATA2 (FZC_ZCP + 0x00068UL)
#define ZCP_RAM_DATA3 (FZC_ZCP + 0x00070UL)
#define ZCP_RAM_DATA4 (FZC_ZCP + 0x00078UL)
#define ZCP_RAM_BE (FZC_ZCP + 0x00080UL)
#define ZCP_RAM_ACC (FZC_ZCP + 0x00088UL)
#define CHK_BIT_DATA (FZC_ZCP + 0x00090UL)
#define RESET_CFIFO (FZC_ZCP + 0x00098UL)
#define CFIFO_ECC(PORT) (FZC_ZCP + 0x000a0UL + (PORT) * 8UL)
#define ZCP_TRAINING_VECTOR (FZC_ZCP + 0x000c0UL)
#define ZCP_STATE_MACHINE (FZC_ZCP + 0x000c8UL)
#define ZCP_INT_STAT_TEST (FZC_ZCP + 0x00108UL)