FW_BOOT
ivpu_dbg(vdev, FW_BOOT, "FW %s API version: %d.%d (expected %d.%d)\n",
ivpu_dbg(vdev, FW_BOOT, "Preemption buffer size, primary: %u, secondary: %u\n",
ivpu_dbg(vdev, FW_BOOT, "Header version: 0x%x, format 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "Mid-inference preemption %s supported\n",
ivpu_dbg(vdev, FW_BOOT, "Boot params: address 0x%llx, size %llu\n",
ivpu_dbg(vdev, FW_BOOT, "FW version: address 0x%llx, size %llu\n",
ivpu_dbg(vdev, FW_BOOT, "Runtime: address 0x%llx, size %u\n",
ivpu_dbg(vdev, FW_BOOT, "Image load offset: 0x%llx, size %u\n",
ivpu_dbg(vdev, FW_BOOT, "Read-only section: address 0x%llx, size %u\n",
ivpu_dbg(vdev, FW_BOOT, "FW cold boot entry point: 0x%llx\n", fw->cold_boot_entry_point);
ivpu_dbg(vdev, FW_BOOT, "SHAVE NN size: %u\n", fw->shave_nn_size);
ivpu_dbg(vdev, FW_BOOT, "boot_params.magic = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.vpu_id = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.vpu_count = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.frequency = %u\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.perf_clk_frequency = %u\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.ipc_header_area_start = 0x%llx\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.ipc_header_area_size = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.shared_region_base = 0x%llx\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.shared_region_size = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.ipc_payload_area_start = 0x%llx\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.ipc_payload_area_size = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.global_aliased_pio_base = 0x%llx\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.global_aliased_pio_size = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.autoconfig = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.cache_defaults[VPU_BOOT_L2_CACHE_CFG_NN].use = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.cache_defaults[VPU_BOOT_L2_CACHE_CFG_NN].cfg = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.shave_nn_fw_base = 0x%llx\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.watchdog_irq_mss = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.watchdog_irq_nce = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.host_version_id = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.si_stepping = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.device_id = 0x%llx\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.feature_exclusion = 0x%llx\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.sku = 0x%llx\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.min_freq_pll_ratio = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.pn_freq_pll_ratio = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.max_freq_pll_ratio = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.default_trace_level = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.tracing_buff_message_format_mask = 0x%llx\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.trace_destination_mask = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.trace_hw_component_mask = 0x%llx\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.boot_type = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.punit_telemetry_sram_base = 0x%llx\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.punit_telemetry_sram_size = 0x%llx\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.vpu_telemetry_enable = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.vpu_scheduling_mode = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.dvfs_mode = %u\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.d0i3_delayed_entry = %d\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.d0i3_residency_time_us = %lld\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.d0i3_entry_vpu_ts = %llu\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.system_time_us = %llu\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.power_profile = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.vpu_uses_ecc_mca_signal = 0x%x\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.boot_type = 0x%x\n", boot_params->boot_type);
ivpu_dbg(vdev, FW_BOOT, "boot_params.d0i3_residency_time_us = %lld\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.d0i3_entry_vpu_ts = %llu\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.system_time_us = %llu\n",
ivpu_dbg(vdev, FW_BOOT, "boot_params.boot_type = 0x%x\n", boot_params->boot_type);
ivpu_dbg(vdev, FW_BOOT, "Invalid header size 0x%x\n", log->header_size);
ivpu_dbg(vdev, FW_BOOT, "Invalid log size 0x%x\n", log->size);
ivpu_dbg(vdev, FW_BOOT, "Invalid log size 0x%x\n", log->size);
ivpu_dbg(vdev, FW_BOOT,
ivpu_dbg(vdev, FW_BOOT, "Cold boot entry point 0x%llx", vdev->fw->cold_boot_entry_point);
ivpu_dbg(vdev, FW_BOOT, "Warm boot entry point 0x%llx", fw->warm_boot_entry_point);
case FW_BOOT:
case FW_BOOT:
ret = af9005_boot_packet(udev, FW_BOOT, &reply, buf,