FShft
(void __iomem *)&TUCR, FShft(TUCR_TSEL),
(0 << FShft (TUCR_TSEL))
(1 << FShft (TUCR_TSEL))
(2 << FShft (TUCR_TSEL))
(3 << FShft (TUCR_TSEL))
(4 << FShft (TUCR_TSEL))
(5 << FShft (TUCR_TSEL))
(6 << FShft (TUCR_TSEL))
(7 << FShft (TUCR_TSEL))
(((Add) - 9) << FShft (MDCNFG_DRAC))
(((Tcpu) - 2)/2 << FShft (MDCNFG_TRP))
(((Tcpu) - 1)/2 << FShft (MDCNFG_TRP))
(((Tcpu) - 2)/2 << FShft (MDCNFG_TRASR))
(((Tcpu) - 1)/2 << FShft (MDCNFG_TRASR))
((Tcpu) << FShft (MDCNFG_TDL))
((Tcpu)/8 << FShft (MDCNFG_DRI))
(((Size) - 1) << FShft (UDCOMP_OUTMAXP))
(0 << FShft (MSC_RT))
(1 << FShft (MSC_RT))
(2 << FShft (MSC_RT))
(3 << FShft (MSC_RT))
((((Tcpu) - 3)/2) << FShft (MSC_RDF))
((((Tcpu) - 2)/2) << FShft (MSC_RDF))
((((Tcpu) - 2)/2) << FShft (MSC_RDF))
((((Tcpu) - 1)/2) << FShft (MSC_RDF))
((((Tcpu) - 2)/2) << FShft (MSC_RDN))
((((Tcpu) - 1)/2) << FShft (MSC_RDN))
((((Tcpu) - 2)/2) << FShft (MSC_RDN))
((((Tcpu) - 1)/2) << FShft (MSC_RDN))
(((Size) - 1) << FShft (UDCIMP_INMAXP))
(((Tcpu)/4) << FShft (MSC_RRR))
((((Tcpu) + 3)/4) << FShft (MSC_RRR))
((((Tcpu) - 2)/2) << FShft (MECR_BSIO))
((((Tcpu) - 1)/2) << FShft (MECR_BSIO))
((((Tcpu) - 2)/2) << FShft (MECR_BSA))
((((Tcpu) - 1)/2) << FShft (MECR_BSA))
((((Tcpu) - 2)/2) << FShft (MECR_BSM))
((((Tcpu) - 1)/2) << FShft (MECR_BSM))
(0 << FShft (LCD_PBS))
(1 << FShft (LCD_PBS))
(2 << FShft (LCD_PBS))
((Tcpu)/2 << FShft (LCCR0_PDD))
(((Pixel) - 16)/16 << FShft (LCCR1_PPL))
(((Tpix) - 1) << FShft (LCCR1_HSW))
(((Tpix) - 1) << FShft (LCCR1_ELW))
(((Tpix) - 1) << FShft (LCCR1_BLW))
(((Line) - 1) << FShft (LCCR2_LPP))
(((Tln) - 1) << FShft (LCCR2_VSW))
((Tln) << FShft (LCCR2_EFW))
((Tln) << FShft (LCCR2_BFW))
(((Div) - 4)/2 << FShft (LCCR3_PCD))
(((Div) - 3)/2 << FShft (LCCR3_PCD))
(((Div) - 2)/2 << FShft (LCCR3_ACB))
(((Div) - 1)/2 << FShft (LCCR3_ACB))
(0 << FShft (LCCR3_API))
((Trans) << FShft (LCCR3_API))
FShft (UTCR1_BRD))
FShft (UTCR2_BRD))
FShft (UTCR1_BRD))
FShft (UTCR2_BRD))
FShft (SDCR3_BRD))
FShft (SDCR4_BRD))
FShft (SDCR3_BRD))
FShft (SDCR4_BRD))
((Div)/32 << FShft (MCCR0_ASD))
(((Div) + 31)/32 << FShft (MCCR0_ASD))
((Div)/32 << FShft (MCCR0_TSD))
(((Div) + 31)/32 << FShft (MCCR0_TSD))
(((Div) - 1) << FShft (MCCR0_ECP))
(((Size) - 1) << FShft (SSCR0_DSS))
(0 << FShft (SSCR0_FRF))
(1 << FShft (SSCR0_FRF))
(2 << FShft (SSCR0_FRF))
(((Div) - 2)/2 << FShft (SSCR0_SCR))
(((Div) - 1)/2 << FShft (SSCR0_SCR))
(0x00 << FShft (PPCR_CCF))
(0x01 << FShft (PPCR_CCF))
(0x02 << FShft (PPCR_CCF))
(0x03 << FShft (PPCR_CCF))
(0x04 << FShft (PPCR_CCF))
(0x05 << FShft (PPCR_CCF))
(0x06 << FShft (PPCR_CCF))
(0x07 << FShft (PPCR_CCF))
(0x08 << FShft (PPCR_CCF))
(0x09 << FShft (PPCR_CCF))
(0x0A << FShft (PPCR_CCF))
(0x0B << FShft (PPCR_CCF))
(0x0C << FShft (PPCR_CCF))
(0x0D << FShft (PPCR_CCF))
(0x0E << FShft (PPCR_CCF))
(0x0F << FShft (PPCR_CCF))
((UData (Data) >> FShft (Field)) & FAlnMsk (Field))
#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field))
#define F1stBit(Field) (UData (1) << FShft (Field))
(UData (Value) << FShft (Field))
#define LCCR1_BegLnDel(Tpix) (((Tpix) - 1) << FShft (LCCR1_BLW))
#define LCCR2_DisHght(Line) (((Line) - 1) << FShft (LCCR2_LPP))
#define LCCR2_VrtSnchWdth(Tln) (((Tln) - 1) << FShft (LCCR2_VSW))
#define LCCR2_EndFrmDel(Tln) ((Tln) << FShft (LCCR2_EFW))
#define LCCR2_BegFrmDel(Tln) ((Tln) << FShft (LCCR2_BFW))
#define LCCR3_PixClkDiv(Div) (((Div) << FShft (LCCR3_PCD)))
#define LCCR3_Acb(Acb) (((Acb) << FShft (LCCR3_ACB)))
#define LCCR1_DisWdth(Pixel) (((Pixel) - 1) << FShft (LCCR1_PPL))
#define LCCR1_HorSnchWdth(Tpix) (((Tpix) - 1) << FShft (LCCR1_HSW))
#define LCCR1_EndLnDel(Tpix) (((Tpix) - 1) << FShft (LCCR1_ELW))