FSL_PWM_CLK_CNTEN
clk_disable_unprepare(fpc->clk[FSL_PWM_CLK_CNTEN]);
ret = clk_prepare_enable(fpc->clk[FSL_PWM_CLK_CNTEN]);
fpc->clk[FSL_PWM_CLK_CNTEN] =
if (IS_ERR(fpc->clk[FSL_PWM_CLK_CNTEN]))
return PTR_ERR(fpc->clk[FSL_PWM_CLK_CNTEN]);
clk_disable_unprepare(fpc->clk[FSL_PWM_CLK_CNTEN]);
clk_prepare_enable(fpc->clk[FSL_PWM_CLK_CNTEN]);