arch/arm64/include/asm/alternative-macros.h

234

ALTERNATIVE("b %l[l_no]", "nop", %[cpucap])

arch/arm64/include/asm/alternative-macros.h

255

ALTERNATIVE("nop", "b %l[l_yes]", %[cpucap])

arch/arm64/include/asm/arch_timer.h

183

asm volatile(ALTERNATIVE("isb\n mrs %0, cntpct_el0",

arch/arm64/include/asm/arch_timer.h

204

asm volatile(ALTERNATIVE("isb\n mrs %0, cntvct_el0",

arch/arm64/include/asm/arch_timer.h

69

asm volatile(ALTERNATIVE("isb\n mrs %0, cntpct_el0",

arch/arm64/include/asm/arch_timer.h

81

asm volatile(ALTERNATIVE("isb\n mrs %0, cntvct_el0",

arch/arm64/include/asm/barrier.h

43

#define spec_bar() asm volatile(ALTERNATIVE("dsb nsh\nisb\n", \

arch/arm64/include/asm/io.h

57

asm volatile(ALTERNATIVE("ldrb %w0, [%1]",

arch/arm64/include/asm/io.h

69

asm volatile(ALTERNATIVE("ldrh %w0, [%1]",

arch/arm64/include/asm/io.h

80

asm volatile(ALTERNATIVE("ldr %w0, [%1]",

arch/arm64/include/asm/io.h

91

asm volatile(ALTERNATIVE("ldr %0, [%1]",

arch/arm64/include/asm/kvm_hyp.h

45

asm volatile(ALTERNATIVE(__mrs_s("%0", r##nvh), \

arch/arm64/include/asm/kvm_hyp.h

55

asm volatile(ALTERNATIVE(__msr_s(r##nvh, "%x0"), \

arch/arm64/include/asm/kvm_mmu.h

332

asm(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_SPECULATIVE_AT));

arch/arm64/include/asm/lse.h

26

ALTERNATIVE(llsc, __LSE_PREAMBLE lse, ARM64_HAS_LSE_ATOMICS)

arch/arm64/include/asm/mte-kasan.h

56

asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(0),

arch/arm64/include/asm/mte-kasan.h

62

asm volatile(ALTERNATIVE("nop", SET_PSTATE_TCO(1),

arch/arm64/include/asm/percpu.h

17

asm volatile(ALTERNATIVE("msr tpidr_el1, %0",

arch/arm64/include/asm/percpu.h

40

asm(ALTERNATIVE("mrs %0, tpidr_el1",

arch/arm64/include/asm/rwonce.h

16

ALTERNATIVE( \

arch/arm64/include/asm/sysreg.h

1246

asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412)); \

arch/arm64/include/asm/sysreg.h

1248

asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412)); \

arch/arm64/include/asm/uaccess.h

127

asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN));

arch/arm64/include/asm/uaccess.h

132

asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN));

arch/arm64/kernel/pi/patch-scs.c

90

asm(ALTERNATIVE("dc cvau, %0", "nop", ARM64_HAS_CACHE_IDC)

arch/arm64/kvm/at.c

600

asm(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_SPECULATIVE_AT));

arch/arm64/kvm/hyp/include/hyp/switch.h

922

asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412));

arch/arm64/kvm/hyp/nvhe/mem_protect.c

345

asm(ALTERNATIVE("isb", "nop", ARM64_WORKAROUND_SPECULATIVE_AT));

arch/arm64/kvm/hyp/nvhe/tlb.c

115

asm(ALTERNATIVE("isb", "nop", ARM64_WORKAROUND_SPECULATIVE_AT));

arch/arm64/kvm/hyp/vhe/switch.c

182

asm(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_SPECULATIVE_AT));

arch/arm64/mm/context.c

344

asm(ALTERNATIVE("nop; nop; nop",

arch/loongarch/include/asm/alternative-asm.h

29

.macro ALTERNATIVE oldinstr, newinstr, feature

arch/loongarch/include/asm/alternative.h

104

(asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory"))

arch/parisc/include/asm/barrier.h

12

ALTERNATIVE(ALT_COND_NO_SMP, INSN_NOP) \

arch/parisc/include/asm/cache.h

53

ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \

arch/parisc/include/asm/cache.h

56

ALTERNATIVE(ALT_COND_NO_SMP, INSN_PxTLB) \

arch/parisc/include/asm/cache.h

57

ALTERNATIVE(ALT_COND_NO_SPLIT_TLB, INSN_NOP) \

arch/parisc/include/asm/cache.h

61

ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \

arch/parisc/include/asm/cache.h

62

ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) \

arch/parisc/include/asm/cache.h

65

ALTERNATIVE(ALT_COND_NO_DCACHE, INSN_NOP) \

arch/parisc/include/asm/cache.h

66

ALTERNATIVE(ALT_COND_NO_IOC_FDC, INSN_NOP) :::"memory")

arch/riscv/include/asm/cpufeature-macros.h

21

asm goto(ALTERNATIVE("j %l[l_no]", "nop", %[vendor], %[ext], 1)

arch/riscv/include/asm/cpufeature-macros.h

35

asm goto(ALTERNATIVE("nop", "j %l[l_yes]", %[vendor], %[ext], 1)

arch/riscv/include/asm/errata_list.h

102

asm volatile(ALTERNATIVE( \

arch/riscv/include/asm/errata_list.h

18

ALTERNATIVE(__stringify(RISCV_PTR do_trap_insn_fault), \

arch/riscv/include/asm/errata_list.h

24

ALTERNATIVE(__stringify(RISCV_PTR do_page_fault), \

arch/riscv/include/asm/errata_list.h

31

asm(ALTERNATIVE("sfence.vma x0, %0", "sfence.vma", SIFIVE_VENDOR_ID, \

arch/riscv/include/asm/errata_list.h

36

asm(ALTERNATIVE("sfence.vma %0", "sfence.vma", SIFIVE_VENDOR_ID, \

arch/riscv/include/asm/errata_list.h

41

asm(ALTERNATIVE("sfence.vma %0, %1", "sfence.vma", SIFIVE_VENDOR_ID, \

arch/riscv/include/asm/errata_list.h

46

asm(ALTERNATIVE( \

arch/riscv/include/asm/errata_list.h

81

asm volatile(ALTERNATIVE( \

arch/riscv/include/asm/processor.h

149

ALTERNATIVE(__nops(1), PREFETCH_R(x, 0), 0, \

arch/riscv/include/asm/processor.h

153

ALTERNATIVE(__nops(1), PREFETCH_W(x, 0), 0, \

arch/riscv/include/asm/runtime-const.h

108

ALTERNATIVE( \

arch/riscv/include/asm/runtime-const.h

122

ALTERNATIVE( \

arch/riscv/include/asm/switch_to.h

86

asm volatile (ALTERNATIVE("nop", "csrw " __stringify(CSR_ENVCFG) ", %0",

arch/s390/include/asm/alternative.h

164

asm_inline volatile(ALTERNATIVE(oldinstr, altinstr, feature) : : : "memory")

arch/s390/include/asm/alternative.h

172

asm_inline volatile (ALTERNATIVE(oldinstr, newinstr, feature) \

arch/s390/include/asm/alternative.h

177

asm_inline volatile(ALTERNATIVE(oldinstr, altinstr, feature) \

arch/s390/include/asm/alternative.h

209

.macro ALTERNATIVE oldinstr, newinstr, feature

arch/s390/include/asm/current.h

24

ALTERNATIVE(" lg %[ptr],%[offzero](%%r0)\n",

arch/s390/include/asm/facility.h

62

ALTERNATIVE("brcl 15,%l[l_no]", "brcl 0,0", ALT_FACILITY(%[nr]))

arch/s390/include/asm/lowcore.h

226

ALTERNATIVE(" lghi %[lc],0",

arch/s390/include/asm/lowcore.h

244

ALTERNATIVE "lghi \reg,0", \

arch/s390/include/asm/lowcore.h

250

ALTERNATIVE "stmg \start, \end, \savearea", \

arch/s390/include/asm/machine.h

71

ALTERNATIVE("brcl 15,%l[l_no]", "brcl 0,0", ALT_FEATURE(%[nr]))

arch/s390/include/asm/preempt.h

122

ALTERNATIVE("alsi %[offzero](%%r0),%[val]\n",

arch/s390/include/asm/preempt.h

35

ALTERNATIVE("llgt %[count],%[offzero](%%r0)\n",

arch/s390/include/asm/preempt.h

91

ALTERNATIVE("asi %[offzero](%%r0),%[val]\n",

arch/s390/include/asm/processor.h

414

ALTERNATIVE(" nop\n",

arch/s390/include/asm/smp.h

23

ALTERNATIVE(" ly %[cpu],%[offzero](%%r0)\n",

arch/s390/include/asm/spinlock.h

100

ALTERNATIVE("nop", ".insn rre,0xb2fa0000,7,0", ALT_FACILITY(49)) /* NIAI 7 */

arch/s390/include/asm/spinlock.h

27

ALTERNATIVE(" ly %[lockval],%[offzero](%%r0)\n",

arch/s390/lib/spinlock.c

111

ALTERNATIVE("nop", ".insn rre,0xb2fa0000,8,0", ALT_FACILITY(49)) /* NIAI 8 */

arch/s390/lib/spinlock.c

126

ALTERNATIVE("nop", ".insn rre,0xb2fa0000,8,0", ALT_FACILITY(49)) /* NIAI 8 */

arch/s390/lib/spinlock.c

98

ALTERNATIVE("nop", ".insn rre,0xb2fa0000,4,0", ALT_FACILITY(49)) /* NIAI 4 */

arch/x86/entry/calling.h

168

ALTERNATIVE "", "SET_NOFLUSH_BIT \reg", X86_FEATURE_PCID

arch/x86/entry/calling.h

174

ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI

arch/x86/entry/calling.h

187

ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID

arch/x86/entry/calling.h

217

ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI

arch/x86/entry/calling.h

223

ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI

arch/x86/entry/calling.h

231

ALTERNATIVE "jmp .Ldone_\@", "", X86_FEATURE_PTI

arch/x86/entry/calling.h

250

ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI

arch/x86/entry/calling.h

260

ALTERNATIVE "jmp .Lwrcr3_\@", "", X86_FEATURE_PCID

arch/x86/entry/calling.h

307

ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_KERNEL_IBRS

arch/x86/entry/calling.h

336

ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_KERNEL_IBRS

arch/x86/entry/calling.h

364

ALTERNATIVE "", "lfence", X86_FEATURE_FENCE_SWAPGS_USER

arch/x86/entry/calling.h

367

ALTERNATIVE "", "lfence", X86_FEATURE_FENCE_SWAPGS_KERNEL

arch/x86/include/asm/alternative.h

223

ALTERNATIVE(ALTERNATIVE(oldinstr, newinstr1, ft_flags1), newinstr2, ft_flags2)

arch/x86/include/asm/alternative.h

231

ALTERNATIVE(ALTERNATIVE_2(oldinstr, newinstr1, ft_flags1, newinstr2, ft_flags2), \

arch/x86/include/asm/alternative.h

247

asm_inline volatile(ALTERNATIVE(oldinstr, newinstr, ft_flags) : : : "memory")

arch/x86/include/asm/alternative.h

261

asm_inline volatile(ALTERNATIVE(oldinstr, newinstr, ft_flags) \

arch/x86/include/asm/alternative.h

266

asm_inline volatile(ALTERNATIVE(oldinstr, newinstr, ft_flags) \

arch/x86/include/asm/alternative.h

280

asm_inline volatile(ALTERNATIVE("call %c[old]", "call %c[new]", ft_flags) \

arch/x86/include/asm/alternative.h

375

.macro ALTERNATIVE oldinstr, newinstr, ft_flags

arch/x86/include/asm/arch_hweight.h

19

asm_inline (ALTERNATIVE("call __sw_hweight32",

arch/x86/include/asm/arch_hweight.h

48

asm_inline (ALTERNATIVE("call __sw_hweight64",

arch/x86/include/asm/barrier.h

15

#define mb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "mfence", \

arch/x86/include/asm/barrier.h

17

#define rmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "lfence", \

arch/x86/include/asm/barrier.h

19

#define wmb() asm volatile(ALTERNATIVE("lock addl $0,-4(%%esp)", "sfence", \

arch/x86/include/asm/cmpxchg_32.h

124

ALTERNATIVE(_lock_loc \

arch/x86/include/asm/cmpxchg_32.h

94

ALTERNATIVE(_lock_loc \

arch/x86/include/asm/kvm_para.h

22

ALTERNATIVE("vmcall", "vmmcall", X86_FEATURE_VMMCALL)

arch/x86/include/asm/msr.h

240

asm volatile("1: " ALTERNATIVE("ds wrmsr", ASM_WRMSRNS, X86_FEATURE_WRMSRNS)

arch/x86/include/asm/nospec-branch.h

299

ALTERNATIVE "", \

arch/x86/include/asm/nospec-branch.h

330

ALTERNATIVE "", __CLEAR_CPU_BUFFERS, X86_FEATURE_CLEAR_CPU_BUF

arch/x86/include/asm/nospec-branch.h

334

ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_LOOP

arch/x86/include/asm/nospec-branch.h

338

ALTERNATIVE "", "call clear_bhb_loop", X86_FEATURE_CLEAR_BHB_VMEXIT

arch/x86/include/asm/nospec-branch.h

403

ALTERNATIVE("", \

arch/x86/include/asm/nospec-branch.h

528

asm volatile(ALTERNATIVE("", "wrmsr", %c[feature])

arch/x86/include/asm/nospec-branch.h

540

asm_inline volatile(ALTERNATIVE("", "call write_ibpb", X86_FEATURE_IBPB)

arch/x86/include/asm/paravirt_types.h

349

asm volatile(ALTERNATIVE(PARAVIRT_CALL, ALT_CALL_INSTR, \

arch/x86/include/asm/percpu.h

339

ALTERNATIVE("call this_cpu_cmpxchg8b_emu", \

arch/x86/include/asm/percpu.h

368

ALTERNATIVE("call this_cpu_cmpxchg8b_emu", \

arch/x86/include/asm/percpu.h

407

ALTERNATIVE("call this_cpu_cmpxchg16b_emu", \

arch/x86/include/asm/percpu.h

436

ALTERNATIVE("call this_cpu_cmpxchg16b_emu", \

arch/x86/include/asm/processor.h

714

asm volatile(ALTERNATIVE("", "div %2\n\t", X86_BUG_DIV0)

arch/x86/include/asm/smap.h

101

ALTERNATIVE("", "stac", X86_FEATURE_SMAP)

arch/x86/include/asm/smap.h

104

ALTERNATIVE("", ANNOTATE_IGNORE_ALTERNATIVE "\n\t" "clac", X86_FEATURE_SMAP)

arch/x86/include/asm/smap.h

106

ALTERNATIVE("", ANNOTATE_IGNORE_ALTERNATIVE "\n\t" "stac", X86_FEATURE_SMAP)

arch/x86/include/asm/smap.h

19

ALTERNATIVE "", "clac", X86_FEATURE_SMAP

arch/x86/include/asm/smap.h

22

ALTERNATIVE "", "stac", X86_FEATURE_SMAP

arch/x86/include/asm/smap.h

80

ALTERNATIVE(ANNOTATE_IGNORE_ALTERNATIVE "\n\t"

arch/x86/include/asm/smap.h

91

ALTERNATIVE(ANNOTATE_IGNORE_ALTERNATIVE "\n\t"

arch/x86/include/asm/smap.h

99

ALTERNATIVE("", "clac", X86_FEATURE_SMAP)

arch/x86/include/asm/uaccess_64.h

128

ALTERNATIVE("rep movsb",

arch/x86/include/asm/uaccess_64.h

192

ALTERNATIVE("rep stosb",

arch/x86/include/asm/uaccess_64.h

29

asm_inline (ALTERNATIVE("", "and " __percpu_arg([mask]) ", %[addr]",

arch/x86/include/asm/vdso/sys_call.h

23

# define __sys_instr ALTERNATIVE("ds;ds;ds;int $0x80", \

arch/x86/kernel/alternative.c

2375

ALTERNATIVE("", "lea %[mem], %%" _ASM_ARG1 "; call __alt_reloc_selftest;", X86_FEATURE_ALWAYS)

arch/x86/kernel/fpu/xstate.h

167

asm volatile("1: " ALTERNATIVE(XRSTOR, \

drivers/perf/riscv_pmu_sbi.c

45

asm volatile(ALTERNATIVE( \

tools/arch/arm64/include/asm/sysreg.h

1181

asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412)); \

tools/arch/arm64/include/asm/sysreg.h

1183

asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412)); \

tools/include/asm/alternative.h

7

.macro ALTERNATIVE oldinstr, newinstr, feature