drivers/cpufreq/intel_pstate.c

53

#define int_tofp(X) ((int64_t)(X) << FRAC_BITS)

drivers/cpufreq/intel_pstate.c

54

#define fp_toint(X) ((X) >> FRAC_BITS)

drivers/cpufreq/intel_pstate.c

56

#define ONE_EIGHTH_FP ((int64_t)1 << (FRAC_BITS - 3))

drivers/cpufreq/intel_pstate.c

59

#define EXT_FRAC_BITS (EXT_BITS + FRAC_BITS)

drivers/cpufreq/intel_pstate.c

65

return ((int64_t)x * (int64_t)y) >> FRAC_BITS;

drivers/cpufreq/intel_pstate.c

70

return div64_s64((int64_t)x << FRAC_BITS, y);

drivers/cpufreq/intel_pstate.c

78

mask = (1 << FRAC_BITS) - 1;

drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c

128

multiplier = 1 << FRAC_BITS;

drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c

168

ssc_step_size *= (1 << FRAC_BITS);

drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c

179

config->decimal_div_start, frac, FRAC_BITS);

drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c

433

multiplier = 1 << FRAC_BITS;

drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c

140

multiplier = 1 << FRAC_BITS;

drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c

222

ssc_step_size *= (1 << FRAC_BITS);

drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c

233

config->decimal_div_start, frac, FRAC_BITS);

drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c

592

multiplier = 1 << FRAC_BITS;

drivers/gpu/drm/radeon/radeon_legacy_tv.c

614

tmp |= (vert_space * (1 << FRAC_BITS) / 10000);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

644

tv_y_saw_tooth_cntl = (vert_space * SLOPE_value[i] * (1 << (FRAC_BITS - 1)) +

drivers/gpu/drm/radeon/radeon_legacy_tv.c

646

(1 << (FRAC_BITS - 1)) / 8) << 16);

drivers/gpu/drm/radeon/radeon_legacy_tv.c

649

RADEON_Y_FALL_PING_PONG | (272 * SLOPE_value[i] / 8) * (1 << (FRAC_BITS - 1)) /

drivers/gpu/drm/radeon/radeon_legacy_tv.c

652

(flicker_removal * 1024 - 272) * SLOPE_value[i] / 8 * (1 << (FRAC_BITS - 1)) / 1024;

drivers/net/wireless/realtek/rtw88/phy.c

871

linear = i > 2 ? linear << FRAC_BITS : linear;

drivers/net/wireless/realtek/rtw88/phy.c

884

if (i <= 2 && (linear << FRAC_BITS) <= db_invert_table[i][j])

drivers/net/wireless/realtek/rtw88/phy.c

938

sum = (sum + (1 << (FRAC_BITS - 1))) >> FRAC_BITS;

drivers/staging/media/ipu3/ipu3-css-params.c

2877

static const unsigned int FRAC_BITS = IMGU_ABI_GDC_FRAC_BITS;

drivers/staging/media/ipu3/ipu3-css-params.c

2895

gdc_luma.p0_x = (OFFSET_X - (OFFSET_X & XMEM_ALIGN_MASK)) << FRAC_BITS;

drivers/staging/media/ipu3/ipu3-css-params.c

2897

gdc_luma.p1_x = gdc_luma.p0_x + (IMGU_DVS_BLOCK_W << FRAC_BITS);

drivers/staging/media/ipu3/ipu3-css-params.c

2900

gdc_luma.p2_y = gdc_luma.p0_y + (IMGU_DVS_BLOCK_H << FRAC_BITS);

drivers/staging/media/ipu3/ipu3-css-params.c

2918

FRAC_BITS;

drivers/staging/media/ipu3/ipu3-css-params.c

2920

gdc_chroma.p1_x = gdc_chroma.p0_x + (IMGU_DVS_BLOCK_W << FRAC_BITS);

drivers/staging/media/ipu3/ipu3-css-params.c

2923

gdc_chroma.p2_y = gdc_chroma.p0_y + (IMGU_DVS_BLOCK_H / 2 << FRAC_BITS);

drivers/thermal/gov_power_allocator.c

20

#define int_to_frac(x) ((x) << FRAC_BITS)

drivers/thermal/gov_power_allocator.c

21

#define frac_to_int(x) ((x) >> FRAC_BITS)

drivers/thermal/gov_power_allocator.c

33

return (x * y) >> FRAC_BITS;

drivers/thermal/gov_power_allocator.c

440

weight = 1 << FRAC_BITS;

drivers/thermal/gov_power_allocator.c

46

return div_s64(x << FRAC_BITS, y);

net/sched/sch_qfq.c

112

#define ONE_FP (1UL << FRAC_BITS)

net/sched/sch_qfq.c

1463

q->min_slot_shift = FRAC_BITS + maxbudg_shift - QFQ_MAX_INDEX;