arch/loongarch/include/asm/fpu.h

65

return fcsr & ((fcsr & FPU_CSR_ALL_E) <<

arch/loongarch/include/asm/fpu.h

66

(ffs(FPU_CSR_ALL_X) - ffs(FPU_CSR_ALL_E)));

arch/loongarch/kernel/cpu-probe.c

35

mask = FPU_CSR_ALL_X | FPU_CSR_ALL_E | FPU_CSR_ALL_S | FPU_CSR_RM;

arch/loongarch/kernel/signal.c

351

enabled = ((csr & FPU_CSR_ALL_E) << 24);

arch/mips/include/asm/fpu_emulator.h

183

((fcr31 & FPU_CSR_ALL_E) <<

arch/mips/include/asm/fpu_emulator.h

184

(ffs(FPU_CSR_ALL_X) - ffs(FPU_CSR_ALL_E))));

arch/mips/kernel/fpu-probe.c

54

mask = FPU_CSR_ALL_X | FPU_CSR_ALL_E | FPU_CSR_ALL_S | FPU_CSR_RM;

arch/mips/kernel/signal.c

503

enabled = FPU_CSR_UNI_X | ((csr & FPU_CSR_ALL_E) << 5);

arch/mips/math-emu/cp1emu.c

1179

if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {

arch/mips/math-emu/cp1emu.c

1567

if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {

arch/mips/math-emu/cp1emu.c

2765

if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {

arch/mips/math-emu/cp1emu.c

866

value |= fcr31 & (FPU_CSR_ALL_E | FPU_CSR_RM);

arch/mips/math-emu/cp1emu.c

932

fcr31 &= ~(FPU_CSR_FS | FPU_CSR_ALL_E | FPU_CSR_RM);

arch/mips/math-emu/cp1emu.c

935

fcr31 |= value & (FPU_CSR_ALL_E | FPU_CSR_RM);