FLUSH
out_le32(&((regs)->control), (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);\
out_le32(&((regs)->control), (RUN|FLUSH)<<16); \
while(in_le32(&((regs)->status)) & (ACTIVE|FLUSH)) \
out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);
THEAD_CMO_OP(FLUSH, paddr, size, riscv_cbom_block_size);
ALT_CMO_OP(FLUSH, flush_addr, size, riscv_cbom_block_size);
ALT_CMO_OP(FLUSH, vaddr, size, riscv_cbom_block_size);
P4_ESCR_EMASK_BIT(P4_EVENT_TC_MISC, FLUSH),
REQ_OP_NAME(FLUSH),
flush_time = spk_get_var(FLUSH);
{ FLUSH, .u.n = {NULL, 4000, 10, 4000, 0, 0, NULL } },
{ "flush_time", FLUSH, VAR_TIME, NULL, NULL },
writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma_regs->control);
writel((FLUSH << 16) | FLUSH, &dma_regs->control);
if ((dstat & FLUSH) == 0)
rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
out_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD));
out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD));
DBDMA_CLEAR(ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN));
rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */
out_le32(&dma->control, (WAKE|FLUSH|PAUSE|RUN) << 16);
out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
out_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16);
rd->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
td->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
rqst.base.packet.priority = SSH_PACKET_PRIORITY(FLUSH, 0);
regs->FLUSH = 1;
volatile unsigned short FLUSH;
regs->FLUSH = 1;
volatile unsigned short FLUSH;
writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* stop dma */
out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* stop dma */
PUT_RING(PARSER | FLUSH);
out_le32(&rec->dma->control, (RUN|WAKE|FLUSH|PAUSE) << 16);
out_le32(&rec->dma->control, (RUN|PAUSE|FLUSH|WAKE) << 16);
out_le32(&chip->playback.dma->control, (RUN|PAUSE|FLUSH|WAKE|DEAD) << 16);
out_le32(&chip->capture.dma->control, (RUN|PAUSE|FLUSH|WAKE|DEAD) << 16);