ALL
P4_ESCR_EMASK_BIT(P4_EVENT_SSE_INPUT_ASSIST, ALL),
P4_ESCR_EMASK_BIT(P4_EVENT_PACKED_SP_UOP, ALL),
P4_ESCR_EMASK_BIT(P4_EVENT_PACKED_DP_UOP, ALL),
P4_ESCR_EMASK_BIT(P4_EVENT_SCALAR_SP_UOP, ALL),
P4_ESCR_EMASK_BIT(P4_EVENT_SCALAR_DP_UOP, ALL),
P4_ESCR_EMASK_BIT(P4_EVENT_64BIT_MMX_UOP, ALL),
P4_ESCR_EMASK_BIT(P4_EVENT_128BIT_MMX_UOP, ALL),
P4_ESCR_EMASK_BIT(P4_EVENT_X87_FP_UOP, ALL),
ata_for_each_dev(dev, link, ALL)
ata_for_each_dev(tdev, tlink, ALL)
ata_for_each_dev(dev, &ap->link, ALL) {
ata_for_each_dev(dev, &ap->link, ALL) {
ata_for_each_dev(dev, link, ALL) {
ata_for_each_dev(dev, link, ALL)
ata_for_each_dev(dev, link, ALL) {
ata_for_each_dev(dev, link, ALL)
ata_for_each_dev(dev, link, ALL)
ata_for_each_dev(dev, link, ALL) {
ata_for_each_dev(dev, link, ALL) {
ata_for_each_dev(dev, link, ALL) {
ata_for_each_dev(dev, link, ALL) {
ata_for_each_dev(dev, link, ALL)
ata_for_each_dev(dev, link, ALL) {
ata_for_each_dev(dev, link, ALL) {
ata_for_each_dev(dev, link, ALL)
ata_for_each_dev(dev, link, ALL) {
ata_for_each_dev(dev, link, ALL) {
ata_for_each_dev(dev, link, ALL) {
ata_for_each_dev(dev, link, ALL) {
ata_for_each_dev(dev, link, ALL)
ata_for_each_dev(dev, link, ALL)
ata_for_each_dev(tdev, link, ALL)
ata_for_each_dev(tdev, link, ALL)
ata_for_each_dev(dev, &ap->link, ALL)
ata_for_each_dev(dev, link, ALL) {
ata_for_each_dev(ata_dev, link, ALL) {
ata_for_each_dev(ata_dev, link, ALL) {
ata_for_each_dev(dev, &ap->link, ALL) {
ata_for_each_dev(dev, &ap->link, ALL)
ata_for_each_dev(dev, link, ALL) {
fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_DISABLE(ALL));
CASE_BTC_POLUT_STR(ALL);
#define INITIAL_SENDTARGETS ALL
mf624_disable_interrupt(ALL, info);
mf624_enable_interrupt(ALL, info);
mf624_disable_interrupt(ALL, info);
case ALL:
case ALL:
CTA_FILTER_FLAG(ALL));
_(ALL),
RX_FILTER(ALL),