FM10K_TXDCTL
reg = fm10k_read_reg(hw, FM10K_TXDCTL(i));
fm10k_write_reg(hw, FM10K_TXDCTL(i),
reg = fm10k_read_reg(hw, FM10K_TXDCTL(i));
u32 txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(0));
buff[idx++] = fm10k_read_reg(hw, FM10K_TXDCTL(i));
fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), 0);
fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl);
if (fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)) & FM10K_TXDCTL_ENABLE)
txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx));
fm10k_write_reg(hw, FM10K_TXDCTL(i), 0);
fm10k_write_reg(hw, FM10K_TXDCTL(vf_q_idx), 0);
fm10k_write_reg(hw, FM10K_TXDCTL(vf_q_idx), 0);
txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(vf_q_idx));
txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(vf_q_idx));
fm10k_write_reg(hw, FM10K_TXDCTL(i), 0);