drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1497

.lcdsel_big = FIELD_PREP_WM16_CONST(PX30_DSI_LCDC_SEL, 0),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1498

.lcdsel_lit = FIELD_PREP_WM16_CONST(PX30_DSI_LCDC_SEL, 1),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1501

.lanecfg1 = FIELD_PREP_WM16_CONST((PX30_DSI_TURNDISABLE |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1514

.lanecfg1 = FIELD_PREP_WM16_CONST((RK3128_DSI_TURNDISABLE |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1526

.lcdsel_big = FIELD_PREP_WM16_CONST(RK3288_DSI0_LCDC_SEL, 0),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1527

.lcdsel_lit = FIELD_PREP_WM16_CONST(RK3288_DSI0_LCDC_SEL, 1),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1534

.lcdsel_big = FIELD_PREP_WM16_CONST(RK3288_DSI1_LCDC_SEL, 0),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1535

.lcdsel_lit = FIELD_PREP_WM16_CONST(RK3288_DSI1_LCDC_SEL, 1),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1546

.lanecfg1 = FIELD_PREP_WM16_CONST((RK3368_DSI_TURNDISABLE |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1626

.lcdsel_big = FIELD_PREP_WM16_CONST(RK3399_DSI0_LCDC_SEL, 0),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1627

.lcdsel_lit = FIELD_PREP_WM16_CONST(RK3399_DSI0_LCDC_SEL, 1),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1630

.lanecfg1 = FIELD_PREP_WM16_CONST((RK3399_DSI0_TURNREQUEST |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1641

.lcdsel_big = FIELD_PREP_WM16_CONST(RK3399_DSI1_LCDC_SEL, 0),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1642

.lcdsel_lit = FIELD_PREP_WM16_CONST(RK3399_DSI1_LCDC_SEL, 1),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1646

.lanecfg1 = FIELD_PREP_WM16_CONST((RK3399_DSI1_TURNDISABLE |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1652

.lanecfg2 = (FIELD_PREP_WM16_CONST(RK3399_TXRX_MASTERSLAVEZ, 1) |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1653

FIELD_PREP_WM16_CONST(RK3399_TXRX_ENABLECLK, 1) |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1654

FIELD_PREP_WM16_CONST(RK3399_TXRX_BASEDIR, 0)),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1657

.enable = FIELD_PREP_WM16_CONST(RK3399_DSI1_ENABLE, RK3399_DSI1_ENABLE),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1673

.lanecfg1 = (FIELD_PREP_WM16_CONST(RK3506_DSI_TURNDISABLE, 0) |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1674

FIELD_PREP_WM16_CONST(RK3506_DSI_FORCERXMODE, 0) |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1675

FIELD_PREP_WM16_CONST(RK3506_DSI_FORCETXSTOPMODE, 0)),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1685

.lanecfg1 = (FIELD_PREP_WM16_CONST(RK3568_DSI0_SKEWCALHS, 0) |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1686

FIELD_PREP_WM16_CONST(RK3568_DSI0_FORCETXSTOPMODE, 0) |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1687

FIELD_PREP_WM16_CONST(RK3568_DSI0_TURNDISABLE, 0) |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1688

FIELD_PREP_WM16_CONST(RK3568_DSI0_FORCERXMODE, 0)),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1694

.lanecfg1 = (FIELD_PREP_WM16_CONST(RK3568_DSI1_SKEWCALHS, 0) |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1695

FIELD_PREP_WM16_CONST(RK3568_DSI1_FORCETXSTOPMODE, 0) |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1696

FIELD_PREP_WM16_CONST(RK3568_DSI1_TURNDISABLE, 0) |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1697

FIELD_PREP_WM16_CONST(RK3568_DSI1_FORCERXMODE, 0)),

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1707

.lanecfg1 = (FIELD_PREP_WM16_CONST(RV1126_DSI_TURNDISABLE, 0) |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1708

FIELD_PREP_WM16_CONST(RV1126_DSI_FORCERXMODE, 0) |

drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c

1709

FIELD_PREP_WM16_CONST(RV1126_DSI_FORCETXSTOPMODE, 0)),

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

435

.lcdsel_big = FIELD_PREP_WM16_CONST(RK3288_HDMI_LCDC_SEL, 0),

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

436

.lcdsel_lit = FIELD_PREP_WM16_CONST(RK3288_HDMI_LCDC_SEL, 1),

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

485

.lcdsel_big = FIELD_PREP_WM16_CONST(RK3399_HDMI_LCDC_SEL, 0),

drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c

486

.lcdsel_lit = FIELD_PREP_WM16_CONST(RK3399_HDMI_LCDC_SEL, 1),

drivers/pci/controller/pcie-rockchip.h

25

#define HWORD_SET_BIT(val) (FIELD_PREP_WM16_CONST((val), 1))

drivers/pci/controller/pcie-rockchip.h

26

#define HWORD_CLR_BIT(val) (FIELD_PREP_WM16_CONST((val), 0))

drivers/soc/rockchip/grf.c

105

{ "pwm2 select", RK3368_PMUGRF_SOC_CON0, FIELD_PREP_WM16_CONST(BIT(7), 0) },

drivers/soc/rockchip/grf.c

116

{ "jtag switching", RK3399_GRF_SOC_CON7, FIELD_PREP_WM16_CONST(BIT(12), 0) },

drivers/soc/rockchip/grf.c

127

{ "usb3otg port switch", RK3566_GRF_USB3OTG0_CON1, FIELD_PREP_WM16_CONST(BIT(12), 0) },

drivers/soc/rockchip/grf.c

128

{ "usb3otg clock switch", RK3566_GRF_USB3OTG0_CON1, FIELD_PREP_WM16_CONST(BIT(7), 1) },

drivers/soc/rockchip/grf.c

129

{ "usb3otg disable usb3", RK3566_GRF_USB3OTG0_CON1, FIELD_PREP_WM16_CONST(BIT(0), 1) },

drivers/soc/rockchip/grf.c

140

{ "i3c0 weakpull", RK3576_SYSGRF_SOC_CON1, FIELD_PREP_WM16_CONST(GENMASK(7, 6), 3) },

drivers/soc/rockchip/grf.c

141

{ "i3c1 weakpull", RK3576_SYSGRF_SOC_CON1, FIELD_PREP_WM16_CONST(GENMASK(9, 8), 3) },

drivers/soc/rockchip/grf.c

152

{ "jtag switching", RK3576_IOCGRF_MISC_CON, FIELD_PREP_WM16_CONST(BIT(1), 0) },

drivers/soc/rockchip/grf.c

163

{ "jtag switching", RK3588_GRF_SOC_CON6, FIELD_PREP_WM16_CONST(BIT(14), 0) },

drivers/soc/rockchip/grf.c

34

{ "jtag switching", RK3036_GRF_SOC_CON0, FIELD_PREP_WM16_CONST(BIT(11), 0) },

drivers/soc/rockchip/grf.c

46

{ "jtag switching", RK3128_GRF_SOC_CON0, FIELD_PREP_WM16_CONST(BIT(8), 0) },

drivers/soc/rockchip/grf.c

47

{ "vpu main clock", RK3128_GRF_SOC_CON1, FIELD_PREP_WM16_CONST(BIT(10), 0) },

drivers/soc/rockchip/grf.c

58

{ "jtag switching", RK3228_GRF_SOC_CON6, FIELD_PREP_WM16_CONST(BIT(8), 0) },

drivers/soc/rockchip/grf.c

70

{ "jtag switching", RK3288_GRF_SOC_CON0, FIELD_PREP_WM16_CONST(BIT(12), 0) },

drivers/soc/rockchip/grf.c

71

{ "pwm select", RK3288_GRF_SOC_CON2, FIELD_PREP_WM16_CONST(BIT(0), 1) },

drivers/soc/rockchip/grf.c

82

{ "jtag switching", RK3328_GRF_SOC_CON4, FIELD_PREP_WM16_CONST(BIT(12), 0) },

drivers/soc/rockchip/grf.c

93

{ "jtag switching", RK3368_GRF_SOC_CON15, FIELD_PREP_WM16_CONST(BIT(13), 0) },

drivers/soc/rockchip/grf.c

94

{ "pwm select", RK3368_GRF_SOC_CON15, FIELD_PREP_WM16_CONST(BIT(12), 1) },

sound/soc/rockchip/rockchip_i2s_tdm.h

290

#define HIWORD_UPDATE(v, h, l) (FIELD_PREP_WM16_CONST(GENMASK((h), (l)), (v)))