drivers/gpu/drm/xe/tests/xe_rtp_test.c

231

XE_RTP_ACTIONS(FIELD_SET(REGULAR_REG1,

drivers/gpu/drm/xe/xe_hw_engine.c

395

XE_RTP_ACTIONS(FIELD_SET(BLIT_CCTL(0),

drivers/gpu/drm/xe/xe_hw_engine.c

404

XE_RTP_ACTIONS(FIELD_SET(CS_CHICKEN1(0),

drivers/gpu/drm/xe/xe_hw_engine.c

439

XE_RTP_ACTIONS(FIELD_SET(RING_CMD_CCTL(0),

drivers/gpu/drm/xe/xe_hw_engine.c

456

FIELD_SET(RING_PWRCTX_MAXCNT(0),

drivers/gpu/drm/xe/xe_hw_engine.c

470

XE_RTP_ACTIONS(FIELD_SET(RCU_MODE, RCU_MODE_FIXED_SLICE_CCS_MODE,

drivers/gpu/drm/xe/xe_tuning.c

117

XE_RTP_ACTIONS(FIELD_SET(XEHP_L3SQCREG5, L3_PWM_TIMER_INIT_VAL_MASK,

drivers/gpu/drm/xe/xe_tuning.c

136

XE_RTP_ACTIONS(FIELD_SET(XEHP_L3SQCREG5, L3_PWM_TIMER_INIT_VAL_MASK,

drivers/gpu/drm/xe/xe_tuning.c

144

XE_RTP_ACTIONS(FIELD_SET(FF_MODE, VS_HIT_MAX_VALUE_MASK,

drivers/gpu/drm/xe/xe_tuning.c

35

XE_RTP_ACTIONS(FIELD_SET(XEHP_L3SQCREG5, L3_PWM_TIMER_INIT_VAL_MASK,

drivers/gpu/drm/xe/xe_tuning.c

40

XE_RTP_ACTIONS(FIELD_SET(XE2LPM_L3SQCREG5, L3_PWM_TIMER_INIT_VAL_MASK,

drivers/gpu/drm/xe/xe_tuning.c

76

XE_RTP_ACTIONS(FIELD_SET(STATELESS_COMPRESSION_CTRL, UNIFIED_COMPRESSION_FORMAT,

drivers/gpu/drm/xe/xe_tuning.c

81

XE_RTP_ACTIONS(FIELD_SET(STATELESS_COMPRESSION_CTRL, UNIFIED_COMPRESSION_FORMAT,

drivers/gpu/drm/xe/xe_wa.c

244

XE_RTP_ACTIONS(FIELD_SET(LSN_VC_REG2,

drivers/gpu/drm/xe/xe_wa.c

396

XE_RTP_ACTIONS(FIELD_SET(LSC_CHICKEN_BIT_0_UDW,

drivers/gpu/drm/xe/xe_wa.c

642

XE_RTP_ACTIONS(FIELD_SET(SAMPLER_MODE, SMP_WAIT_FETCH_MERGING_COUNTER,

drivers/gpu/drm/xe/xe_wa.c

699

XE_RTP_ACTIONS(FIELD_SET(CS_CHICKEN1(RENDER_RING_BASE),

drivers/gpu/drm/xe/xe_wa.c

734

XE_RTP_ACTIONS(FIELD_SET(VF_PREEMPTION,

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1016

cfg = FIELD_SET(CGX_PFC_CLASS_MASK, pfc_en, cfg);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1019

cfg = FIELD_SET(CGX_PFC_CLASS_MASK, 0, cfg);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1098

req = FIELD_SET(CMDREG_OWN, CGX_CMD_OWN_FIRMWARE, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1482

req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_FWD_BASE, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1515

req = FIELD_SET(CMDREG_ID, CGX_CMD_MODE_CHANGE, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1516

req = FIELD_SET(CMDMODECHANGE_SPEED,

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1518

req = FIELD_SET(CMDMODECHANGE_DUPLEX, args.duplex, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1519

req = FIELD_SET(CMDMODECHANGE_AN, args.an, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1520

req = FIELD_SET(CMDMODECHANGE_MODE_BASEIDX, args.mode_baseidx, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1521

req = FIELD_SET(CMDMODECHANGE_FLAGS, args.mode, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1535

req = FIELD_SET(CMDREG_ID, CGX_CMD_SET_FEC, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1536

req = FIELD_SET(CMDSETFEC, fec, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1554

req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_PHY_FEC_STATS, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1564

req = FIELD_SET(CMDREG_ID, CGX_CMD_LINK_BRING_UP, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1571

req = FIELD_SET(LINKCFG_TIMEOUT, 1000, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1574

req = FIELD_SET(CMDREG_ID, CGX_CMD_LINK_BRING_DOWN, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

1584

req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_FW_VER, req);

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

948

cfg = FIELD_SET(CGX_PFC_CLASS_MASK, 0, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rpm.c

397

cfg = FIELD_SET(RPM_PFC_CLASS_MASK, 0, cfg);

drivers/net/ethernet/marvell/octeontx2/af/rpm.c

473

req = FIELD_SET(CMDREG_ID, CGX_CMD_GET_LINK_STS, req);

drivers/net/ethernet/marvell/octeontx2/af/rpm.c

659

class_en = FIELD_SET(RPM_PFC_CLASS_MASK, pfc_en, class_en);

drivers/net/ethernet/marvell/octeontx2/af/rpm.c

663

class_en = FIELD_SET(RPM_PFC_CLASS_MASK, 0, class_en);

drivers/soc/qcom/spm.c

355

vctl = FIELD_SET(vctl, SPM_VCTL_VLVL, vlevel);

drivers/soc/qcom/spm.c

356

data0 = FIELD_SET(data0, SPM_PMIC_DATA_0_VLVL, vlevel);

drivers/soc/qcom/spm.c

357

data1 = FIELD_SET(data1, SPM_PMIC_DATA_1_MIN_VSEL, volt_sel);

drivers/soc/qcom/spm.c

358

data1 = FIELD_SET(data1, SPM_PMIC_DATA_1_MAX_VSEL, volt_sel);

drivers/soc/qcom/spm.c

376

avs_ctl = FIELD_SET(avs_ctl, SPM_AVS_CTL_MIN_VLVL, min_avs);

drivers/soc/qcom/spm.c

377

avs_ctl = FIELD_SET(avs_ctl, SPM_AVS_CTL_MAX_VLVL, max_avs);