drivers/gpu/drm/i915/display/intel_fdi.c

1019

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

1038

intel_de_rmw(display, FDI_TX_CTL(pipe), FDI_TX_PLL_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_fdi.c

1039

intel_de_posting_read(display, FDI_TX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

1056

intel_de_rmw(display, FDI_TX_CTL(pipe), FDI_TX_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_fdi.c

1057

intel_de_posting_read(display, FDI_TX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

1074

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

445

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

45

cur_state = intel_de_read(display, FDI_TX_CTL(pipe)) & FDI_TX_ENABLE;

drivers/gpu/drm/i915/display/intel_fdi.c

506

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

544

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

605

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

634

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

636

intel_de_posting_read(display, FDI_TX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

659

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

685

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

687

intel_de_posting_read(display, FDI_TX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

747

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

761

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

806

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

95

cur_state = intel_de_read(display, FDI_TX_CTL(pipe)) & FDI_TX_PLL_ENABLE;

drivers/gpu/drm/i915/gvt/handlers.c

864

fdi_tx_ctl = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/gvt/handlers.c

916

calc_index(offset, FDI_TX_CTL(PIPE_A), FDI_TX_CTL(PIPE_B), FDI_TX_CTL(PIPE_C))