drivers/gpu/drm/i915/display/intel_fdi.c

1020

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

1039

intel_de_rmw(display, FDI_TX_CTL(pipe), FDI_TX_PLL_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_fdi.c

1040

intel_de_posting_read(display, FDI_TX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

1057

intel_de_rmw(display, FDI_TX_CTL(pipe), FDI_TX_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_fdi.c

1058

intel_de_posting_read(display, FDI_TX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

1075

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

446

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

45

cur_state = intel_de_read(display, FDI_TX_CTL(pipe)) & FDI_TX_ENABLE;

drivers/gpu/drm/i915/display/intel_fdi.c

507

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

545

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

606

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

635

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

637

intel_de_posting_read(display, FDI_TX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

660

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

686

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

688

intel_de_posting_read(display, FDI_TX_CTL(pipe));

drivers/gpu/drm/i915/display/intel_fdi.c

748

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

762

reg = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/display/intel_fdi.c

807

intel_de_rmw(display, FDI_TX_CTL(pipe),

drivers/gpu/drm/i915/display/intel_fdi.c

95

cur_state = intel_de_read(display, FDI_TX_CTL(pipe)) & FDI_TX_PLL_ENABLE;

drivers/gpu/drm/i915/gvt/handlers.c

865

fdi_tx_ctl = FDI_TX_CTL(pipe);

drivers/gpu/drm/i915/gvt/handlers.c

917

calc_index(offset, FDI_TX_CTL(PIPE_A), FDI_TX_CTL(PIPE_B), FDI_TX_CTL(PIPE_C))