arch/sparc/net/bpf_jit_comp_32.c

85

#define CALL F1(1)

arch/sparc/net/bpf_jit_comp_64.c

161

#define CALL F1(1)

crypto/cast5_generic.c

327

t = l; l = r; r = t ^ F1(r, Km[0], Kr[0]);

crypto/cast5_generic.c

330

t = l; l = r; r = t ^ F1(r, Km[3], Kr[3]);

crypto/cast5_generic.c

333

t = l; l = r; r = t ^ F1(r, Km[6], Kr[6]);

crypto/cast5_generic.c

336

t = l; l = r; r = t ^ F1(r, Km[9], Kr[9]);

crypto/cast5_generic.c

340

t = l; l = r; r = t ^ F1(r, Km[12], Kr[12]);

crypto/cast5_generic.c

343

t = l; l = r; r = t ^ F1(r, Km[15], Kr[15]);

crypto/cast5_generic.c

372

t = l; l = r; r = t ^ F1(r, Km[15], Kr[15]);

crypto/cast5_generic.c

375

t = l; l = r; r = t ^ F1(r, Km[12], Kr[12]);

crypto/cast5_generic.c

379

t = l; l = r; r = t ^ F1(r, Km[9], Kr[9]);

crypto/cast5_generic.c

382

t = l; l = r; r = t ^ F1(r, Km[6], Kr[6]);

crypto/cast5_generic.c

385

t = l; l = r; r = t ^ F1(r, Km[3], Kr[3]);

crypto/cast5_generic.c

388

t = l; l = r; r = t ^ F1(r, Km[0], Kr[0]);

crypto/cast6_generic.c

102

key[0] ^= F1(key[1], Tr[i % 4][6], Tm[i][6]);

crypto/cast6_generic.c

156

block[2] ^= F1(block[3], Kr[0], Km[0]);

crypto/cast6_generic.c

159

block[3] ^= F1(block[0], Kr[3], Km[3]);

crypto/cast6_generic.c

166

block[3] ^= F1(block[0], Kr[3], Km[3]);

crypto/cast6_generic.c

169

block[2] ^= F1(block[3], Kr[0], Km[0]);

crypto/cast6_generic.c

96

key[6] ^= F1(key[7], Tr[i % 4][0], Tm[i][0]);

crypto/cast6_generic.c

99

key[3] ^= F1(key[4], Tr[i % 4][3], Tm[i][3]);

crypto/rmd160.c

226

ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[12], 8);

crypto/rmd160.c

227

ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[15], 5);

crypto/rmd160.c

228

ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[10], 12);

crypto/rmd160.c

229

ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[4], 9);

crypto/rmd160.c

230

ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[1], 12);

crypto/rmd160.c

231

ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[5], 5);

crypto/rmd160.c

232

ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[8], 14);

crypto/rmd160.c

233

ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[7], 6);

crypto/rmd160.c

234

ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[6], 8);

crypto/rmd160.c

235

ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[2], 13);

crypto/rmd160.c

236

ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[13], 6);

crypto/rmd160.c

237

ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[14], 5);

crypto/rmd160.c

238

ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[0], 15);

crypto/rmd160.c

239

ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[3], 13);

crypto/rmd160.c

240

ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[9], 11);

crypto/rmd160.c

241

ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[11], 11);

crypto/rmd160.c

64

ROUND(aa, bb, cc, dd, ee, F1, K1, in[0], 11);

crypto/rmd160.c

65

ROUND(ee, aa, bb, cc, dd, F1, K1, in[1], 14);

crypto/rmd160.c

66

ROUND(dd, ee, aa, bb, cc, F1, K1, in[2], 15);

crypto/rmd160.c

67

ROUND(cc, dd, ee, aa, bb, F1, K1, in[3], 12);

crypto/rmd160.c

68

ROUND(bb, cc, dd, ee, aa, F1, K1, in[4], 5);

crypto/rmd160.c

69

ROUND(aa, bb, cc, dd, ee, F1, K1, in[5], 8);

crypto/rmd160.c

70

ROUND(ee, aa, bb, cc, dd, F1, K1, in[6], 7);

crypto/rmd160.c

71

ROUND(dd, ee, aa, bb, cc, F1, K1, in[7], 9);

crypto/rmd160.c

72

ROUND(cc, dd, ee, aa, bb, F1, K1, in[8], 11);

crypto/rmd160.c

73

ROUND(bb, cc, dd, ee, aa, F1, K1, in[9], 13);

crypto/rmd160.c

74

ROUND(aa, bb, cc, dd, ee, F1, K1, in[10], 14);

crypto/rmd160.c

75

ROUND(ee, aa, bb, cc, dd, F1, K1, in[11], 15);

crypto/rmd160.c

76

ROUND(dd, ee, aa, bb, cc, F1, K1, in[12], 6);

crypto/rmd160.c

77

ROUND(cc, dd, ee, aa, bb, F1, K1, in[13], 7);

crypto/rmd160.c

78

ROUND(bb, cc, dd, ee, aa, F1, K1, in[14], 9);

crypto/rmd160.c

79

ROUND(aa, bb, cc, dd, ee, F1, K1, in[15], 8);

drivers/edac/amd64_edac.c

108

amd64_read_pci_cfg(pvt->F1, DCT_CFG_SEL, &reg);

drivers/edac/amd64_edac.c

111

amd64_write_pci_cfg(pvt->F1, DCT_CFG_SEL, reg);

drivers/edac/amd64_edac.c

1685

amd64_read_pci_cfg(pvt->F1, DRAM_LOCAL_NODE_LIM, &tmp);

drivers/edac/amd64_edac.c

1700

amd64_read_pci_cfg(pvt->F1, DRAM_LOCAL_NODE_BASE, &tmp);

drivers/edac/amd64_edac.c

1741

amd64_read_pci_cfg(pvt->F1, DRAM_BASE_LO + off, &pvt->ranges[range].base.lo);

drivers/edac/amd64_edac.c

1742

amd64_read_pci_cfg(pvt->F1, DRAM_LIMIT_LO + off, &pvt->ranges[range].lim.lo);

drivers/edac/amd64_edac.c

1750

amd64_read_pci_cfg(pvt->F1, DRAM_BASE_HI + off, &pvt->ranges[range].base.hi);

drivers/edac/amd64_edac.c

1751

amd64_read_pci_cfg(pvt->F1, DRAM_LIMIT_HI + off, &pvt->ranges[range].lim.hi);

drivers/edac/amd64_edac.c

2388

amd64_read_pci_cfg(pvt->F1, DRAM_CONT_BASE, &dct_cont_base_reg);

drivers/edac/amd64_edac.c

2389

amd64_read_pci_cfg(pvt->F1, DRAM_CONT_LIMIT, &dct_cont_limit_reg);

drivers/edac/amd64_edac.c

2467

amd64_read_pci_cfg(pvt->F1,

drivers/edac/amd64_edac.c

2870

pvt->F1 = pci_get_related_function(pvt->F3->vendor, pci_id1, pvt->F3);

drivers/edac/amd64_edac.c

2871

if (!pvt->F1) {

drivers/edac/amd64_edac.c

2879

pci_dev_put(pvt->F1);

drivers/edac/amd64_edac.c

2880

pvt->F1 = NULL;

drivers/edac/amd64_edac.c

2889

edac_dbg(1, "F1: %s\n", pci_name(pvt->F1));

drivers/edac/amd64_edac.c

2998

amd64_read_pci_cfg(pvt->F1, DHAR, &pvt->dhar);

drivers/edac/amd64_edac.c

3732

pci_dev_put(pvt->F1);

drivers/edac/amd64_edac.h

329

struct pci_dev *F1, *F2, *F3;

drivers/edac/amd64_edac.h

502

amd64_read_pci_cfg(pvt->F1, DRAM_CONT_LIMIT, &tmp);

drivers/edac/amd64_edac.h

512

amd64_read_pci_cfg(pvt->F1, DRAM_CONT_BASE, &tmp);

drivers/edac/amd64_edac.h

522

amd64_read_pci_cfg(pvt->F1, DRAM_CONT_BASE, &tmp);

drivers/gpu/drm/i915/intel_step.h

46

func(F1) \

drivers/gpu/drm/xe/xe_step_types.h

45

func(F1) \

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

1381

SIG_EXPR_LIST_DECL_SINGLE(F1, GPIOX3, GPIOX3, SIG_DESC_SET(SCUA4, 3));

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

1382

SIG_EXPR_LIST_DECL_SINGLE(F1, ADC11, ADC11);

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

1383

PIN_DECL_(F1, SIG_EXPR_LIST_PTR(F1, GPIOX3), SIG_EXPR_LIST_PTR(F1, ADC11));

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

1384

FUNC_GROUP_DECL(ADC11, F1);

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

2011

ASPEED_PINCTRL_PIN(F1),

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

2586

ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, F1, F1, SCUA8, 15),

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c

2587

ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, F1, F1, SCUA8, 15),

drivers/pinctrl/pinctrl-pic32.c

1334

PIC32_PINCTRL_GROUP(81, F1,

lib/crypto/md5.c

27

#define F2(x, y, z) F1(z, x, y)

lib/crypto/md5.c

48

MD5STEP(F1, a, b, c, d, in[0] + 0xd76aa478, 7);

lib/crypto/md5.c

49

MD5STEP(F1, d, a, b, c, in[1] + 0xe8c7b756, 12);

lib/crypto/md5.c

50

MD5STEP(F1, c, d, a, b, in[2] + 0x242070db, 17);

lib/crypto/md5.c

51

MD5STEP(F1, b, c, d, a, in[3] + 0xc1bdceee, 22);

lib/crypto/md5.c

52

MD5STEP(F1, a, b, c, d, in[4] + 0xf57c0faf, 7);

lib/crypto/md5.c

53

MD5STEP(F1, d, a, b, c, in[5] + 0x4787c62a, 12);

lib/crypto/md5.c

54

MD5STEP(F1, c, d, a, b, in[6] + 0xa8304613, 17);

lib/crypto/md5.c

55

MD5STEP(F1, b, c, d, a, in[7] + 0xfd469501, 22);

lib/crypto/md5.c

56

MD5STEP(F1, a, b, c, d, in[8] + 0x698098d8, 7);

lib/crypto/md5.c

57

MD5STEP(F1, d, a, b, c, in[9] + 0x8b44f7af, 12);

lib/crypto/md5.c

58

MD5STEP(F1, c, d, a, b, in[10] + 0xffff5bb1, 17);

lib/crypto/md5.c

59

MD5STEP(F1, b, c, d, a, in[11] + 0x895cd7be, 22);

lib/crypto/md5.c

60

MD5STEP(F1, a, b, c, d, in[12] + 0x6b901122, 7);

lib/crypto/md5.c

61

MD5STEP(F1, d, a, b, c, in[13] + 0xfd987193, 12);

lib/crypto/md5.c

62

MD5STEP(F1, c, d, a, b, in[14] + 0xa679438e, 17);

lib/crypto/md5.c

63

MD5STEP(F1, b, c, d, a, in[15] + 0x49b40821, 22);