EXYNOS5_FSEL_24MHZ
case EXYNOS5_FSEL_24MHZ:
if (phy_drd->extrefclk == EXYNOS5_FSEL_24MHZ)
case EXYNOS5_FSEL_24MHZ:
case EXYNOS5_FSEL_24MHZ:
*reg = EXYNOS5_FSEL_24MHZ;
case EXYNOS5_FSEL_24MHZ: