EXT_INT_ENAB
or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */
up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
uap->curregs[1] |= EXT_INT_ENAB;
uap->curregs[1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
zport_a->regs[1] &= ~EXT_INT_ENAB;
zport->regs[1] &= ~EXT_INT_ENAB;
zport->regs[1] &= ~EXT_INT_ENAB;
if (!(zport_a->regs[1] & EXT_INT_ENAB))
zport_a->regs[1] |= EXT_INT_ENAB;
if (!(zport->regs[1] & EXT_INT_ENAB))
zport->regs[1] |= RxINT_ALL | TxINT_ENAB | EXT_INT_ENAB;