ETH_PLL_CTL0
return readl_poll_timeout(pll->base + ETH_PLL_CTL0, val,
val = readl(pll->base + ETH_PLL_CTL0);
writel(val, pll->base + ETH_PLL_CTL0);
val = readl(pll->base + ETH_PLL_CTL0);
writel(0x29c0040a, pll->base + ETH_PLL_CTL0);
mux->reg = priv->regs + ETH_PLL_CTL0;
val = readl(pll->base + ETH_PLL_CTL0);
u32 val = readl(pll->base + ETH_PLL_CTL0);
writel(val, pll->base + ETH_PLL_CTL0);
writel(val, pll->base + ETH_PLL_CTL0);