arch/arm64/include/asm/kvm_emulate.h

417

return !!(kvm_vcpu_get_esr(vcpu) & ESR_ELx_IL);

arch/arm64/include/asm/kvm_emulate.h

87

ESR_ELx_IL;

arch/arm64/kvm/emulate-nested.c

2803

esr &= (ESR_ELx_ERET_ISS_ERETA | ESR_ELx_IL);

arch/arm64/kvm/emulate-nested.c

2953

esr |= ESR_ELx_FSC_EXTABT | ESR_ELx_IL;

arch/arm64/kvm/emulate-nested.c

2970

esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SERROR) | ESR_ELx_IL;

arch/arm64/kvm/hyp/nvhe/hyp-main.c

888

ESR_ELx_IL);

arch/arm64/kvm/hyp/nvhe/pkvm.c

1059

ESR_ELx_IL | ESR_ELx_WNR |

arch/arm64/kvm/hyp/nvhe/sys_regs.c

282

inject_sync64(vcpu, (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT) | ESR_ELx_IL);

arch/arm64/kvm/hyp/vhe/switch.c

517

ESR_ELx_IL;

arch/arm64/kvm/inject_fault.c

144

esr |= ESR_ELx_IL;

arch/arm64/kvm/inject_fault.c

172

u64 esr = (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT) | ESR_ELx_IL;

arch/arm64/kvm/inject_fault.c

256

ESR_ELx_IL;

arch/arm64/kvm/inject_fault.c

384

esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SERROR) | ESR_ELx_IL;

arch/arm64/kvm/mmu.c

2191

ESR_ELx_IL |

arch/arm64/mm/fault.c

105

(esr & ESR_ELx_IL) ? 32 : 16);

arch/arm64/mm/fault.c

485

esr &= ESR_ELx_EC_MASK | ESR_ELx_IL |

arch/arm64/mm/fault.c

495

esr &= ESR_ELx_EC_MASK | ESR_ELx_IL;