AIP_CTRL
regmap_read(hdmi->regs, AIP_CTRL, &aip);
regmap_set_bits(hdmi->regs, AIP_CTRL, CTS_SW_SEL);
regmap_clear_bits(hdmi->regs, AIP_CTRL, CTS_SW_SEL);
regmap_update_bits(hdmi->regs, AIP_CTRL, SPDIF_EN | DSD_EN | HBRA_ON, DSD_EN);
regmap_update_bits(hdmi->regs, AIP_CTRL, I2S_EN, FIELD_PREP(I2S_EN, chnum));
regmap_update_bits(hdmi->regs, AIP_CTRL, SPDIF_EN, FIELD_PREP(SPDIF_EN, spdif_i2s));
regmap_update_bits(hdmi->regs, AIP_CTRL, hbr_mask, HBRA_ON);
regmap_set_bits(hdmi->regs, AIP_CTRL, I2S_EN);
regmap_update_bits(hdmi->regs, AIP_CTRL, hbr_mask, SPDIF_EN);
regmap_set_bits(hdmi->regs, AIP_CTRL, SPDIF_INTERNAL_MODULE);
regmap_set_bits(hdmi->regs, AIP_CTRL, HBR_FROM_SPDIF);
regmap_set_bits(hdmi->regs, AIP_CTRL, CTS_CAL_N4);
regmap_clear_bits(hdmi->regs, AIP_CTRL,
regmap_set_bits(hdmi->regs, AIP_CTRL, AUD_IN_EN);
regmap_clear_bits(hdmi->regs, AIP_CTRL, AUD_IN_EN);
regmap_set_bits(hdmi->regs, AIP_CTRL,