Symbol: AIP_CTRL
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
121
regmap_read(hdmi->regs, AIP_CTRL, &aip);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
306
regmap_set_bits(hdmi->regs, AIP_CTRL, CTS_SW_SEL);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
308
regmap_clear_bits(hdmi->regs, AIP_CTRL, CTS_SW_SEL);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
364
regmap_update_bits(hdmi->regs, AIP_CTRL, SPDIF_EN | DSD_EN | HBRA_ON, DSD_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
384
regmap_update_bits(hdmi->regs, AIP_CTRL, I2S_EN, FIELD_PREP(I2S_EN, chnum));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
483
regmap_update_bits(hdmi->regs, AIP_CTRL, SPDIF_EN, FIELD_PREP(SPDIF_EN, spdif_i2s));
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
568
regmap_update_bits(hdmi->regs, AIP_CTRL, hbr_mask, HBRA_ON);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
569
regmap_set_bits(hdmi->regs, AIP_CTRL, I2S_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
571
regmap_update_bits(hdmi->regs, AIP_CTRL, hbr_mask, SPDIF_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
572
regmap_set_bits(hdmi->regs, AIP_CTRL, SPDIF_INTERNAL_MODULE);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
573
regmap_set_bits(hdmi->regs, AIP_CTRL, HBR_FROM_SPDIF);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
574
regmap_set_bits(hdmi->regs, AIP_CTRL, CTS_CAL_N4);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
606
regmap_clear_bits(hdmi->regs, AIP_CTRL,
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
649
regmap_set_bits(hdmi->regs, AIP_CTRL, AUD_IN_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
651
regmap_clear_bits(hdmi->regs, AIP_CTRL, AUD_IN_EN);
drivers/gpu/drm/mediatek/mtk_hdmi_v2.c
656
regmap_set_bits(hdmi->regs, AIP_CTRL,