ETH
{ ETH, ETH, ETH, ETH, ETH }, /* Ethernet */
{ ETH, ETH, ETH, ETH, ETH }, /* Ethernet */
.pp = { PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
.pp = { PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
.pp = { PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
.pp = { PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
.pp = { PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
.pp = { PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
.pp = { PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
.pp = { PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
.pp = { PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
.pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
.pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
PLL_IDS_TO_ARR_ENTRY(ETH, DIV0), },
unsigned char ETH, VIA;
S2T = 4; S4T = 1; S5T = 6; ETH = 4; VIA = 6;
S2T = 4; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
S2T = 5; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
S2T = 6; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
S2T = 7; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
Vi_set(state, ETH, VIA);
static int Vi_set(struct mb86a16_state *state, unsigned char ETH, unsigned char VIA)
VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, ETH);
VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, ETH, ETHERTYPE);
MFIO_MUX_PIN_GROUP(63, ETH, MIPS_TRACE_CLK, MIPS_TRACE_DATA,
MFIO_MUX_PIN_GROUP(64, ETH, MIPS_TRACE_DINT, MIPS_TRACE_DATA,
MFIO_MUX_PIN_GROUP(65, ETH, MIPS_TRACE_TRIGOUT, MIPS_TRACE_DATA,
MFIO_MUX_PIN_GROUP(66, ETH, MIPS_TRACE_TRIGIN, MIPS_TRACE_DATA,
MFIO_MUX_PIN_GROUP(67, ETH, MIPS_TRACE_DM, MIPS_TRACE_DATA,
MFIO_MUX_PIN_GROUP(68, ETH, MIPS_TRACE_PROBE_N, MIPS_TRACE_DATA,
MFIO_MUX_PIN_GROUP(69, ETH, NONE, MIPS_TRACE_DATA,
MFIO_MUX_PIN_GROUP(70, ETH, NONE, MIPS_TRACE_DATA,
MFIO_PIN_GROUP(71, ETH),
pw_type_name(ETH), \