arch/arm64/include/asm/esr.h

200

#define DISR_EL1_ESR_MASK (ESR_ELx_AET | ESR_ELx_EA | ESR_ELx_FSC)

arch/arm64/include/asm/esr.h

463

esr = esr & ESR_ELx_FSC;

arch/arm64/include/asm/esr.h

474

esr = esr & ESR_ELx_FSC;

arch/arm64/include/asm/esr.h

484

esr = esr & ESR_ELx_FSC;

arch/arm64/include/asm/esr.h

494

esr = esr & ESR_ELx_FSC;

arch/arm64/include/asm/esr.h

501

esr &= ESR_ELx_FSC;

arch/arm64/include/asm/esr.h

512

esr = esr & ESR_ELx_FSC;

arch/arm64/include/asm/esr.h

523

esr = esr & ESR_ELx_FSC;

arch/arm64/include/asm/kvm_emulate.h

375

return kvm_vcpu_get_esr(vcpu) & (ESR_ELx_CM | ESR_ELx_WNR | ESR_ELx_FSC);

arch/arm64/include/asm/kvm_emulate.h

437

return kvm_vcpu_get_esr(vcpu) & ESR_ELx_FSC;

arch/arm64/include/asm/traps.h

101

if ((esr & ESR_ELx_FSC) != ESR_ELx_FSC_SERROR) {

arch/arm64/kvm/hyp/include/hyp/fault.h

17

u64 fsc = esr & ESR_ELx_FSC;

arch/arm64/kvm/inject_fault.c

263

FIELD_PREP(ESR_ELx_FSC, ESR_ELx_FSC_EXCL_ATOMIC) |

arch/arm64/kvm/inject_fault.c

288

esr &= ~ESR_ELx_FSC;

arch/arm64/kvm/mmio.c

207

run->arm_nisv.esr_iss = esr & ~(u64)ESR_ELx_FSC;

arch/arm64/kvm/mmu.c

1998

ESR_ELx_FSC;

arch/arm64/kvm/nested.c

1349

esr &= ~ESR_ELx_FSC;

arch/arm64/kvm/nested.c

1350

esr |= FIELD_PREP(ESR_ELx_FSC,

arch/arm64/kvm/nested.c

1426

esr &= ~ESR_ELx_FSC;

arch/arm64/kvm/nested.c

1427

esr |= FIELD_PREP(ESR_ELx_FSC, vt->wr.fst);

arch/arm64/kvm/nested.c

145

esr = kvm_vcpu_get_esr(vcpu) & ~ESR_ELx_FSC;

arch/arm64/kvm/nested.c

423

result->esr |= (kvm_vcpu_get_esr(vcpu) & ~ESR_ELx_FSC);

arch/arm64/mm/fault.c

109

pr_alert(" FSC = 0x%02lx: %s\n", (esr & ESR_ELx_FSC),

arch/arm64/mm/fault.c

356

unsigned long fsc = esr & ESR_ELx_FSC;

arch/arm64/mm/fault.c

59

return fault_info + (esr & ESR_ELx_FSC);

tools/arch/arm64/include/asm/esr.h

182

#define DISR_EL1_ESR_MASK (ESR_ELx_AET | ESR_ELx_EA | ESR_ELx_FSC)

tools/arch/arm64/include/asm/esr.h

413

esr = esr & ESR_ELx_FSC;

tools/arch/arm64/include/asm/esr.h

424

esr = esr & ESR_ELx_FSC;

tools/arch/arm64/include/asm/esr.h

434

esr = esr & ESR_ELx_FSC;

tools/testing/selftests/kvm/arm64/external_aborts.c

259

GUEST_ASSERT_EQ((esr & ESR_ELx_FSC), ESR_ELx_FSC_SEA_TTW(3));