arch/arm64/include/asm/esr.h

203

#define ESR_ELx_WFx_MASK (ESR_ELx_EC_MASK | \

arch/arm64/include/asm/esr.h

76

#define ESR_ELx_EC(esr) (((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT)

arch/arm64/include/asm/kvm_emulate.h

86

u64 esr = FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SVE) |

arch/arm64/kvm/emulate-nested.c

2712

esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_FPAC);

arch/arm64/kvm/emulate-nested.c

2854

u64 esr = FIELD_PREP(ESR_ELx_EC_MASK,

arch/arm64/kvm/emulate-nested.c

2873

esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SERROR);

arch/arm64/kvm/hyp/vhe/switch.c

515

vcpu->arch.fault.esr_el2 = FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SYS64) |

arch/arm64/kvm/inject_fault.c

262

u64 esr = FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_DABT_LOW) |

arch/arm64/kvm/inject_fault.c

392

esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SERROR);

arch/arm64/kvm/mmu.c

1992

u64 esr_mask = ESR_ELx_EC_MASK |

arch/arm64/mm/fault.c

440

esr &= ESR_ELx_EC_MASK | ESR_ELx_IL |

arch/arm64/mm/fault.c

450

esr &= ESR_ELx_EC_MASK | ESR_ELx_IL;

tools/arch/arm64/include/asm/esr.h

185

#define ESR_ELx_WFx_MASK (ESR_ELx_EC_MASK | \

tools/arch/arm64/include/asm/esr.h

73

#define ESR_ELx_EC(esr) (((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT)