ESR_BASE
esr = ESR_BASE + (level << 2);
__u32 esr = ESR_BASE + (LEVEL(irq) << 2);
#define ESR_RXTX_TUNING_H(CHAN) (ESR_BASE + 0x0083 + (CHAN) * 0x10)
#define ESR_RX_SYNCCHAR_L(CHAN) (ESR_BASE + 0x0084 + (CHAN) * 0x10)
#define ESR_RX_SYNCCHAR_H(CHAN) (ESR_BASE + 0x0085 + (CHAN) * 0x10)
#define ESR_RXTX_TEST_L(CHAN) (ESR_BASE + 0x0086 + (CHAN) * 0x10)
#define ESR_RXTX_TEST_H(CHAN) (ESR_BASE + 0x0087 + (CHAN) * 0x10)
#define ESR_GLUE_CTRL0_L(CHAN) (ESR_BASE + 0x0088 + (CHAN) * 0x10)
#define ESR_GLUE_CTRL0_H(CHAN) (ESR_BASE + 0x0089 + (CHAN) * 0x10)
#define ESR_GLUE_CTRL1_L(CHAN) (ESR_BASE + 0x008a + (CHAN) * 0x10)
#define ESR_GLUE_CTRL1_H(CHAN) (ESR_BASE + 0x008b + (CHAN) * 0x10)
#define ESR_RXTX_TUNING1_L(CHAN) (ESR_BASE + 0x00c2 + (CHAN) * 0x10)
#define ESR_RXTX_TUNING1_H(CHAN) (ESR_BASE + 0x00c2 + (CHAN) * 0x10)
#define ESR_RXTX_TUNING2_L(CHAN) (ESR_BASE + 0x0102 + (CHAN) * 0x10)
#define ESR_RXTX_TUNING2_H(CHAN) (ESR_BASE + 0x0102 + (CHAN) * 0x10)
#define ESR_RXTX_TUNING3_L(CHAN) (ESR_BASE + 0x0142 + (CHAN) * 0x10)
#define ESR_RXTX_TUNING3_H(CHAN) (ESR_BASE + 0x0142 + (CHAN) * 0x10)
#define ESR_RXTX_COMM_CTRL_L (ESR_BASE + 0x0000)
#define ESR_RXTX_COMM_CTRL_H (ESR_BASE + 0x0001)
#define ESR_RXTX_RESET_CTRL_L (ESR_BASE + 0x0002)
#define ESR_RXTX_RESET_CTRL_H (ESR_BASE + 0x0003)
#define ESR_RX_POWER_CTRL_L (ESR_BASE + 0x0004)
#define ESR_RX_POWER_CTRL_H (ESR_BASE + 0x0005)
#define ESR_TX_POWER_CTRL_L (ESR_BASE + 0x0006)
#define ESR_TX_POWER_CTRL_H (ESR_BASE + 0x0007)
#define ESR_MISC_POWER_CTRL_L (ESR_BASE + 0x0008)
#define ESR_MISC_POWER_CTRL_H (ESR_BASE + 0x0009)
#define ESR_RXTX_CTRL_L(CHAN) (ESR_BASE + 0x0080 + (CHAN) * 0x10)
#define ESR_RXTX_CTRL_H(CHAN) (ESR_BASE + 0x0081 + (CHAN) * 0x10)
#define ESR_RXTX_TUNING_L(CHAN) (ESR_BASE + 0x0082 + (CHAN) * 0x10)