ENETC_PM0_CMD_CFG
u32 val = enetc_port_rd(&si->hw, ENETC_PM0_CMD_CFG);
enetc_port_wr(&si->hw, ENETC_PM0_CMD_CFG, val & ~ENETC_PM0_RX_EN);
enetc_port_wr(&si->hw, ENETC_PM0_CMD_CFG, val);
ENETC_PM0_CMD_CFG, ENETC_PM0_MAXFRM, ENETC_PM0_IF_MODE
reg = enetc_port_mac_rd(si, ENETC_PM0_CMD_CFG);
enetc_port_mac_wr(si, ENETC_PM0_CMD_CFG, reg);
enetc_port_mac_wr(si, ENETC_PM0_CMD_CFG, ENETC_PM0_CMD_PHY_TX_EN |
u32 val = enetc_port_mac_rd(si, ENETC_PM0_CMD_CFG);
enetc_port_mac_wr(si, ENETC_PM0_CMD_CFG, val);
cmd_cfg = enetc_port_mac_rd(si, ENETC_PM0_CMD_CFG);
enetc_port_mac_wr(si, ENETC_PM0_CMD_CFG, cmd_cfg);