ENGINE_READ
acthd = ENGINE_READ(engine, RING_ACTHD);
acthd = ENGINE_READ(engine, ACTHD);
bbaddr = ENGINE_READ(engine, RING_BBADDR);
if ((ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR) !=
(ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR))
!(ENGINE_READ(engine, RING_MI_MODE) & MODE_IDLE))
drm_printf(m, "\tCCID: 0x%08x\n", ENGINE_READ(engine, CCID));
ENGINE_READ(engine, RING_EXECLIST_STATUS_HI));
ENGINE_READ(engine, RING_EXECLIST_STATUS_LO));
ENGINE_READ(engine, RING_START));
ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR);
ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR);
ENGINE_READ(engine, RING_CTL),
ENGINE_READ(engine, RING_CTL) & (RING_WAIT | RING_WAIT_SEMAPHORE) ? " [waiting]" : "");
ENGINE_READ(engine, RING_MI_MODE),
ENGINE_READ(engine, RING_MI_MODE) & (MODE_IDLE) ? " [idle]" : "");
ENGINE_READ(engine, RING_IMR));
ENGINE_READ(engine, RING_ESR));
ENGINE_READ(engine, RING_EMR));
ENGINE_READ(engine, RING_EIR));
addr = ENGINE_READ(engine, RING_DMA_FADD);
addr = ENGINE_READ(engine, DMA_FADD_I8XX);
ENGINE_READ(engine, RING_IPEIR));
ENGINE_READ(engine, RING_IPEHR));
drm_printf(m, "\tIPEIR: 0x%08x\n", ENGINE_READ(engine, IPEIR));
drm_printf(m, "\tIPEHR: 0x%08x\n", ENGINE_READ(engine, IPEHR));
ENGINE_READ(engine, RING_EXECLIST_STATUS_LO),
ENGINE_READ(engine, RING_EXECLIST_STATUS_HI),
ENGINE_READ(engine, RING_PP_DIR_BASE));
ENGINE_READ(engine, RING_PP_DIR_BASE_READ));
ENGINE_READ(engine, RING_PP_DIR_DCLV));
ENGINE_READ(engine, RING_START),
ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR,
ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR,
ENGINE_READ(engine, RING_CTL),
ENGINE_READ(engine, RING_MI_MODE));
eir = ENGINE_READ(engine, RING_EIR) & GENMASK(15, 0);
status = ENGINE_READ(engine, RING_ESR);
(ENGINE_READ(engine, RING_MI_MODE) & MODE_IDLE) == 0);
if ((ENGINE_READ(engine, RING_MI_MODE) & MODE_IDLE) == 0)
ENGINE_READ(engine, RING_CTL),
ENGINE_READ(engine, RING_CTL) & RING_VALID,
ENGINE_READ(engine, RING_HEAD), ring->head,
ENGINE_READ(engine, RING_TAIL), ring->tail,
ENGINE_READ(engine, RING_START),
ee->rc_psmi = ENGINE_READ(engine, RING_PSMI_CTL);
ee->esr = ENGINE_READ(engine, RING_ESR);
ee->faddr = ENGINE_READ(engine, RING_DMA_FADD);
ee->ipeir = ENGINE_READ(engine, RING_IPEIR);
ee->ipehr = ENGINE_READ(engine, RING_IPEHR);
ee->instps = ENGINE_READ(engine, RING_INSTPS);
ee->bbaddr = ENGINE_READ(engine, RING_BBADDR);
ee->ccid = ENGINE_READ(engine, CCID);
ee->faddr |= (u64)ENGINE_READ(engine, RING_DMA_FADD_UDW) << 32;
ee->bbaddr |= (u64)ENGINE_READ(engine, RING_BBADDR_UDW) << 32;
ee->bbstate = ENGINE_READ(engine, RING_BBSTATE);
ee->faddr = ENGINE_READ(engine, DMA_FADD_I8XX);
ee->ipeir = ENGINE_READ(engine, IPEIR);
ee->ipehr = ENGINE_READ(engine, IPEHR);
ee->cmd_cctl = ENGINE_READ(engine, RING_CMD_CCTL);
ee->cscmdop = ENGINE_READ(engine, RING_CSCMDOP);
ee->ctx_sr_ctl = ENGINE_READ(engine, RING_CTX_SR_CTL);
ee->dma_faddr_hi = ENGINE_READ(engine, RING_DMA_FADD_UDW);
ee->dma_faddr_lo = ENGINE_READ(engine, RING_DMA_FADD);
ee->nopid = ENGINE_READ(engine, RING_NOPID);
ee->excc = ENGINE_READ(engine, RING_EXCC);
ee->instpm = ENGINE_READ(engine, RING_INSTPM);
ee->start = ENGINE_READ(engine, RING_START);
ee->head = ENGINE_READ(engine, RING_HEAD);
ee->tail = ENGINE_READ(engine, RING_TAIL);
ee->ctl = ENGINE_READ(engine, RING_CTL);
ee->mode = ENGINE_READ(engine, RING_MI_MODE);
ee->vm_info.gfx_mode = ENGINE_READ(engine, RING_MODE_GEN7);
ENGINE_READ(engine, RING_PP_DIR_BASE_READ);
ENGINE_READ(engine, RING_PP_DIR_BASE);
u32 ring = ENGINE_READ(engine, RING_START);