drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c

638

tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE, 1);

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

855

tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE, 1);

drivers/gpu/drm/radeon/cik.c

5442

ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE |

drivers/gpu/drm/radeon/cik.c

5559

ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE |

drivers/gpu/drm/radeon/ni.c

1271

ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE |

drivers/gpu/drm/radeon/ni.c

1350

ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE |

drivers/gpu/drm/radeon/si.c

4288

ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE |

drivers/gpu/drm/radeon/si.c

4374

ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE |