AHCI_PHYCS0R
sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
sunxi_setbits(reg_base + AHCI_PHYCS0R, (0x1 << 19));
reg_val = sunxi_getbits(reg_base + AHCI_PHYCS0R, 0x7, 28);
sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,