arch/arm64/kvm/sys_regs.c

2577

#define EL2_REG_VNCR(name, rst, v) EL2_REG(name, bad_vncr_trap, rst, v)

arch/arm64/kvm/sys_regs.c

2582

#define EL2_REG_REDIR(name, rst, v) EL2_REG(name, bad_redir_trap, rst, v)

arch/arm64/kvm/sys_regs.c

3641

EL2_REG(SCTLR_EL2, access_rw, reset_val, SCTLR_EL2_RES1),

arch/arm64/kvm/sys_regs.c

3642

EL2_REG(ACTLR_EL2, access_rw, reset_val, 0),

arch/arm64/kvm/sys_regs.c

3646

EL2_REG(MDCR_EL2, access_mdcr, reset_mdcr, 0),

arch/arm64/kvm/sys_regs.c

3647

EL2_REG(CPTR_EL2, access_rw, reset_val, CPTR_NVHE_EL2_RES1),

arch/arm64/kvm/sys_regs.c

3659

EL2_REG(TTBR0_EL2, access_rw, reset_val, 0),

arch/arm64/kvm/sys_regs.c

3660

EL2_REG(TTBR1_EL2, access_rw, reset_val, 0),

arch/arm64/kvm/sys_regs.c

3661

EL2_REG(TCR_EL2, access_rw, reset_val, TCR_EL2_RES1),

arch/arm64/kvm/sys_regs.c

3689

EL2_REG(AFSR0_EL2, access_rw, reset_val, 0),

arch/arm64/kvm/sys_regs.c

3690

EL2_REG(AFSR1_EL2, access_rw, reset_val, 0),

arch/arm64/kvm/sys_regs.c

3696

EL2_REG(HPFAR_EL2, access_rw, reset_val, 0),

arch/arm64/kvm/sys_regs.c

3698

EL2_REG(MAIR_EL2, access_rw, reset_val, 0),

arch/arm64/kvm/sys_regs.c

3705

EL2_REG(AMAIR_EL2, access_rw, reset_val, 0),

arch/arm64/kvm/sys_regs.c

3718

EL2_REG(VBAR_EL2, access_rw, reset_val, 0),

arch/arm64/kvm/sys_regs.c

3758

EL2_REG(CONTEXTIDR_EL2, access_rw, reset_val, 0),

arch/arm64/kvm/sys_regs.c

3759

EL2_REG(TPIDR_EL2, access_rw, reset_val, 0),

arch/arm64/kvm/sys_regs.c

3762

EL2_REG(CNTHCTL_EL2, access_rw, reset_val, 0),

arch/arm64/kvm/sys_regs.c

3781

EL2_REG(SP_EL2, NULL, reset_unknown, 0),

arch/arm64/kvm/vgic-sys-reg-v3.c

416

EL2_REG(ICH_AP0R0_EL2, ich_apr),

arch/arm64/kvm/vgic-sys-reg-v3.c

417

EL2_REG(ICH_AP0R1_EL2, ich_apr),

arch/arm64/kvm/vgic-sys-reg-v3.c

418

EL2_REG(ICH_AP0R2_EL2, ich_apr),

arch/arm64/kvm/vgic-sys-reg-v3.c

419

EL2_REG(ICH_AP0R3_EL2, ich_apr),

arch/arm64/kvm/vgic-sys-reg-v3.c

420

EL2_REG(ICH_AP1R0_EL2, ich_apr),

arch/arm64/kvm/vgic-sys-reg-v3.c

421

EL2_REG(ICH_AP1R1_EL2, ich_apr),

arch/arm64/kvm/vgic-sys-reg-v3.c

422

EL2_REG(ICH_AP1R2_EL2, ich_apr),

arch/arm64/kvm/vgic-sys-reg-v3.c

423

EL2_REG(ICH_AP1R3_EL2, ich_apr),

arch/arm64/kvm/vgic-sys-reg-v3.c

425

EL2_REG(ICH_HCR_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

427

EL2_REG(ICH_VMCR_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

428

EL2_REG(ICH_LR0_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

429

EL2_REG(ICH_LR1_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

430

EL2_REG(ICH_LR2_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

431

EL2_REG(ICH_LR3_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

432

EL2_REG(ICH_LR4_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

433

EL2_REG(ICH_LR5_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

434

EL2_REG(ICH_LR6_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

435

EL2_REG(ICH_LR7_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

436

EL2_REG(ICH_LR8_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

437

EL2_REG(ICH_LR9_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

438

EL2_REG(ICH_LR10_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

439

EL2_REG(ICH_LR11_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

440

EL2_REG(ICH_LR12_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

441

EL2_REG(ICH_LR13_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

442

EL2_REG(ICH_LR14_EL2, ich_reg),

arch/arm64/kvm/vgic-sys-reg-v3.c

443

EL2_REG(ICH_LR15_EL2, ich_reg),