EHEA_BMASK_SET
EHEA_BMASK_SET(QPX_SQA_VALUE, nr_wqes));
EHEA_BMASK_SET(QPX_RQ1A_VALUE, nr_wqes));
EHEA_BMASK_SET(QPX_RQ2A_VALUE, nr_wqes));
EHEA_BMASK_SET(QPX_RQ3A_VALUE, nr_wqes));
EHEA_BMASK_SET(CQX_FECADDER, nr_cqes));
EHEA_BMASK_SET(CQX_N1_GENERATE_COMP_EVENT, 1));
EHEA_BMASK_SET(CQX_EP_EVENT_PENDING, 0));
event_mask = EHEA_BMASK_SET(NELR_PORTSTATE_CHG, 1)
| EHEA_BMASK_SET(NELR_ADAPTER_MALFUNC, 1)
| EHEA_BMASK_SET(NELR_PORT_MALFUNC, 1);
cb0->port_rc = EHEA_BMASK_SET(PXLY_RC_VALID, 1)
| EHEA_BMASK_SET(PXLY_RC_IP_CHKSUM, 1)
| EHEA_BMASK_SET(PXLY_RC_TCP_UDP_CHKSUM, 1)
| EHEA_BMASK_SET(PXLY_RC_VLAN_XTRACT, 1)
| EHEA_BMASK_SET(PXLY_RC_VLAN_TAG_FILTER,
| EHEA_BMASK_SET(PXLY_RC_JUMBO_FRAME, 1);
mask = EHEA_BMASK_SET(H_PORT_CB0_PRC, 1)
| EHEA_BMASK_SET(H_PORT_CB0_DEFQPNARRAY, 1);
EHEA_BMASK_SET(H_PORT_CB0_MAC, 1), cb0);
swqe->wr_id = EHEA_BMASK_SET(EHEA_WR_ID_TYPE, EHEA_SWQE3_TYPE)
| EHEA_BMASK_SET(EHEA_WR_ID_COUNT, swqe_num);
swqe->wr_id |= EHEA_BMASK_SET(EHEA_WR_ID_REFILL,
EHEA_BMASK_SET(EHEA_WR_ID_TYPE, EHEA_SWQE2_TYPE)
| EHEA_BMASK_SET(EHEA_WR_ID_COUNT, pr->swqe_id_counter)
| EHEA_BMASK_SET(EHEA_WR_ID_REFILL, 1)
| EHEA_BMASK_SET(EHEA_WR_ID_INDEX, pr->sq_skba.index);
EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF), cb0);
EHEA_BMASK_SET(H_QPCB0_QP_CTL_REG, 1), cb0,
EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF), cb0);
EHEA_BMASK_SET(H_QPCB0_QP_CTL_REG, 1), cb0,
EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF), cb0);
EHEA_BMASK_SET(H_QPCB0_QP_CTL_REG, 1), cb0,
EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF), cb0);
EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF),
EHEA_BMASK_SET(H_QPCB0_QP_CTL_REG,
EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF),
EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF),
EHEA_BMASK_SET(H_QPCB0_QP_CTL_REG,
EHEA_BMASK_SET(H_QPCB0_ALL, 0xFFFF),
rwqe->wr_id = EHEA_BMASK_SET(EHEA_WR_ID_TYPE, wqe_type)
| EHEA_BMASK_SET(EHEA_WR_ID_INDEX, index);
EHEA_BMASK_SET(H_PORT_CB0_ALL, 0xFFFF),
EHEA_BMASK_SET(H_ALL_RES_QP_EQPO, init_attr->low_lat_rq1 ? 1 : 0)
| EHEA_BMASK_SET(H_ALL_RES_QP_QPP, 0)
| EHEA_BMASK_SET(H_ALL_RES_QP_RQR, 6) /* rq1 & rq2 & rq3 */
| EHEA_BMASK_SET(H_ALL_RES_QP_EQEG, 0) /* EQE gen. disabled */
| EHEA_BMASK_SET(H_ALL_RES_QP_LL_QP, init_attr->low_lat_rq1)
| EHEA_BMASK_SET(H_ALL_RES_QP_DMA128, 0)
| EHEA_BMASK_SET(H_ALL_RES_QP_HSM, 0)
| EHEA_BMASK_SET(H_ALL_RES_QP_SIGT, init_attr->signalingtype)
| EHEA_BMASK_SET(H_ALL_RES_QP_RES_TYP, H_ALL_RES_TYPE_QP);
u64 r9_reg = EHEA_BMASK_SET(H_ALL_RES_QP_PD, pd)
| EHEA_BMASK_SET(H_ALL_RES_QP_TOKEN, init_attr->qp_token);
EHEA_BMASK_SET(H_ALL_RES_QP_MAX_SWQE,
| EHEA_BMASK_SET(H_ALL_RES_QP_MAX_R1WQE,
| EHEA_BMASK_SET(H_ALL_RES_QP_MAX_R2WQE,
| EHEA_BMASK_SET(H_ALL_RES_QP_MAX_R3WQE,
| EHEA_BMASK_SET(H_ALL_RES_QP_MAX_SSGE, init_attr->wqe_size_enc_sq)
| EHEA_BMASK_SET(H_ALL_RES_QP_MAX_R1SGE,
| EHEA_BMASK_SET(H_ALL_RES_QP_MAX_R2SGE,
| EHEA_BMASK_SET(H_ALL_RES_QP_MAX_R3SGE,
EHEA_BMASK_SET(H_ALL_RES_QP_SWQE_IDL, init_attr->swqe_imm_data_len)
| EHEA_BMASK_SET(H_ALL_RES_QP_PORT_NUM, init_attr->port_nr);
EHEA_BMASK_SET(H_ALL_RES_QP_TH_RQ2, init_attr->rq2_threshold)
| EHEA_BMASK_SET(H_ALL_RES_QP_TH_RQ3, init_attr->rq3_threshold);
EHEA_BMASK_SET(H_ALL_RES_EQ_RES_TYPE, H_ALL_RES_TYPE_EQ)
| EHEA_BMASK_SET(H_ALL_RES_EQ_NEQ, eq_attr->type ? 1 : 0)
| EHEA_BMASK_SET(H_ALL_RES_EQ_INH_EQE_GEN, !eq_attr->eqe_gen)
| EHEA_BMASK_SET(H_ALL_RES_EQ_NON_NEQ_ISN, 1);
reg_control = EHEA_BMASK_SET(H_REG_RPAGE_PAGE_SIZE, pagesize)
| EHEA_BMASK_SET(H_REG_RPAGE_QT, queue_type);
port_info = EHEA_BMASK_SET(H_MEHEAPORT_CAT, cb_cat)
| EHEA_BMASK_SET(H_MEHEAPORT_PN, port_num);
port_info = EHEA_BMASK_SET(H_MEHEAPORT_CAT, cb_cat)
| EHEA_BMASK_SET(H_MEHEAPORT_PN, port_num);
r5_port_num = EHEA_BMASK_SET(H_REGBCMC_PN, port_num);
r6_reg_type = EHEA_BMASK_SET(H_REGBCMC_REGTYPE, reg_type);
r7_mc_mac_addr = EHEA_BMASK_SET(H_REGBCMC_MACADDR, mac_addr);
r8_vlan_id = EHEA_BMASK_SET(H_REGBCMC_VLANID, vlan_id);