E21
ASPEED_PINCTRL_PIN(E21),
SIG_EXPR_LIST_DECL_SINGLE(E21, SD2CMD, SD2, SD2_DESC);
SIG_EXPR_LIST_DECL_DUAL(E21, GPID0OUT, GPID0, GPID);
PIN_DECL_2(E21, GPIOD1, SD2CMD, GPID0OUT);
FUNC_GROUP_DECL(GPID0, F19, E21);
ASPEED_SB_PINCONF(PIN_CONFIG_INPUT_DEBOUNCE, F19, E21, SCUA8, 20),
FUNC_GROUP_DECL(SD2, F19, E21, F20, D20, D21, E20, G18, C21);
ASPEED_PINCTRL_PIN(E21),
{ PIN_CONFIG_DRIVE_STRENGTH, { E21, B21 }, SCU458, GENMASK(11, 10)},
SIG_EXPR_LIST_DECL_SESG(E21, TXD6, UART6, SIG_DESC_SET(SCU414, 16));
SIG_EXPR_LIST_DECL_SESG(E21, SD2CLK, SD2, SIG_DESC_SET(SCU4B4, 16),
SIG_EXPR_LIST_DECL_SEMG(E21, SALT9, SALT9G0, SALT9, SIG_DESC_SET(SCU694, 16));
PIN_DECL_3(E21, GPIOG0, TXD6, SD2CLK, SALT9);
GROUP_DECL(SALT9G0, E21);
FUNC_GROUP_DECL(UART6, E21, B22);
FUNC_GROUP_DECL(SD2, E21, B22, C21, A22, A21, E20, D21, B21);