E26
ASPEED_PINCTRL_PIN(E26),
SIG_EXPR_LIST_DECL_SESG(E26, RGMII3RXD3, RGMII3, SIG_DESC_SET(SCU410, 27),
SIG_EXPR_LIST_DECL_SESG(E26, RMII3RXER, RMII3, SIG_DESC_SET(SCU410, 27),
PIN_DECL_2(E26, GPIOD3, RGMII3RXD3, RMII3RXER);
E26);
GROUP_DECL(RMII3, H24, J22, H22, H23, G23, F23, F26, F25, E26);
GROUP_DECL(NCSI3, J22, H22, H23, G23, F23, F26, F25, E26);
{ PIN_CONFIG_POWER_SOURCE, { H24, E26 }, SCU458, BIT_MASK(4)},
{ PIN_CONFIG_DRIVE_STRENGTH, { H24, E26 }, SCU458, GENMASK(1, 0)},