drivers/gpu/drm/i915/gvt/cmd_parser.c

2107

F_LEN_VAR | F_LEN_VAR_FIXED, R_ALL, D_BDW_PLUS, 0, 8,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2111

F_LEN_VAR | F_LEN_VAR_FIXED, R_ALL, D_BDW_PLUS, ADDR_FIX_1(2),

drivers/gpu/drm/i915/gvt/cmd_parser.c

2114

{"MI_STORE_DATA_IMM", OP_MI_STORE_DATA_IMM, F_LEN_VAR, R_ALL, D_BDW_PLUS,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2123

{"MI_UPDATE_GTT", OP_MI_UPDATE_GTT, F_LEN_VAR, R_ALL, D_BDW_PLUS, 0, 10,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2158

{"MI_OP_2E", OP_MI_2E, F_LEN_VAR | F_LEN_VAR_FIXED, R_ALL, D_BDW_PLUS,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2161

{"MI_OP_2F", OP_MI_2F, F_LEN_VAR, R_ALL, D_BDW_PLUS, ADDR_FIX_1(1),

drivers/gpu/drm/i915/gvt/cmd_parser.c

2376

D_BDW_PLUS, 0, 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2378

{"3DSTATE_VF_SGVS", OP_3DSTATE_VF_SGVS, F_LEN_VAR, R_RCS, D_BDW_PLUS, 0, 8,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2382

D_BDW_PLUS, 0, 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2385

D_BDW_PLUS, 0, 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2387

{"3DSTATE_PS_BLEND", OP_3DSTATE_PS_BLEND, F_LEN_VAR, R_RCS, D_BDW_PLUS, 0,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2391

R_RCS, D_BDW_PLUS, 0, 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2393

{"3DSTATE_PS_EXTRA", OP_3DSTATE_PS_EXTRA, F_LEN_VAR, R_RCS, D_BDW_PLUS, 0,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2396

{"3DSTATE_RASTER", OP_3DSTATE_RASTER, F_LEN_VAR, R_RCS, D_BDW_PLUS, 0, 8,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2399

{"3DSTATE_SBE_SWIZ", OP_3DSTATE_SBE_SWIZ, F_LEN_VAR, R_RCS, D_BDW_PLUS, 0, 8,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2402

{"3DSTATE_WM_HZ_OP", OP_3DSTATE_WM_HZ_OP, F_LEN_VAR, R_RCS, D_BDW_PLUS, 0, 8,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2406

D_BDW_PLUS, 0, 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2412

D_BDW_PLUS, ADDR_FIX_1(2), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2432

D_BDW_PLUS, 0, 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2435

D_BDW_PLUS, 0, 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2441

D_BDW_PLUS, 0, 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2444

D_BDW_PLUS, 0, 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2490

D_BDW_PLUS, 0, 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2522

{"3DSTATE_SO_BUFFER", OP_3DSTATE_SO_BUFFER, F_LEN_VAR, R_RCS, D_BDW_PLUS,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2527

F_LEN_VAR, R_RCS, D_BDW_PLUS, ADDR_FIX_1(1), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2530

F_LEN_VAR, R_RCS, D_BDW_PLUS, ADDR_FIX_1(1), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2534

F_LEN_VAR, R_RCS, D_BDW_PLUS, ADDR_FIX_1(1), 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2537

D_BDW_PLUS, 0, 8, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2552

{"STATE_BASE_ADDRESS", OP_STATE_BASE_ADDRESS, F_LEN_VAR, R_RCS, D_BDW_PLUS,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2565

{"3DSTATE_CONSTANT_VS", OP_3DSTATE_CONSTANT_VS, F_LEN_VAR, R_RCS, D_BDW_PLUS,

drivers/gpu/drm/i915/gvt/cmd_parser.c

2610

R_VCS, D_BDW_PLUS, 0, 12, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2613

F_LEN_VAR, R_VCS, D_BDW_PLUS, 0, 12, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2616

F_LEN_VAR, R_VCS, D_BDW_PLUS, ADDR_FIX_3(1, 3, 5), 12, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2618

{"OP_2_0_0_5", OP_2_0_0_5, F_LEN_VAR, R_VCS, D_BDW_PLUS, 0, 12, NULL},

drivers/gpu/drm/i915/gvt/cmd_parser.c

2724

{"VEB_DI_IECP", OP_VEB_DNDI_IECP_STATE, F_LEN_VAR, R_VECS, D_BDW_PLUS,

drivers/gpu/drm/i915/gvt/handlers.c

2223

MMIO_DH(GEN8_GAMW_ECO_DEV_RW_IA, D_BDW_PLUS, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2241

MMIO_DH(GEN7_SC_INSTDONE, D_BDW_PLUS, mmio_read_from_hw, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2423

MMIO_DFH(_MMIO(0x215c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2429

MMIO_F(_MMIO(0x2290), 8, F_CMD_ACCESS, 0, 0, D_BDW_PLUS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2434

MMIO_DFH(_MMIO(0x1c17c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2435

MMIO_DFH(_MMIO(0x1c178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2449

MMIO_DH(_MMIO(0x4260), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2450

MMIO_DH(_MMIO(0x4264), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2451

MMIO_DH(_MMIO(0x4268), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2452

MMIO_DH(_MMIO(0x426c), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2453

MMIO_DH(_MMIO(0x4270), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2454

MMIO_DFH(_MMIO(0x4094), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2463

MMIO_DFH(_MMIO(0x22178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2464

MMIO_DFH(_MMIO(0x1a178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2465

MMIO_DFH(_MMIO(0x1a17c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2466

MMIO_DFH(_MMIO(0x2217c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2468

MMIO_DH(EDP_PSR_IMR, D_BDW_PLUS, NULL, edp_psr_imr_iir_write);

drivers/gpu/drm/i915/gvt/handlers.c

2469

MMIO_DH(EDP_PSR_IIR, D_BDW_PLUS, NULL, edp_psr_imr_iir_write);

drivers/gpu/drm/i915/gvt/handlers.c

2479

MMIO_DH(GEN8_GT_IMR(0), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2480

MMIO_DH(GEN8_GT_IER(0), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2481

MMIO_DH(GEN8_GT_IIR(0), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2483

MMIO_DH(GEN8_GT_IMR(1), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2484

MMIO_DH(GEN8_GT_IER(1), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2485

MMIO_DH(GEN8_GT_IIR(1), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2487

MMIO_DH(GEN8_GT_IMR(2), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2488

MMIO_DH(GEN8_GT_IER(2), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2489

MMIO_DH(GEN8_GT_IIR(2), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2491

MMIO_DH(GEN8_GT_IMR(3), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2492

MMIO_DH(GEN8_GT_IER(3), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2493

MMIO_DH(GEN8_GT_IIR(3), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2495

MMIO_DH(GEN8_DE_PIPE_IMR(PIPE_A), D_BDW_PLUS, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2497

MMIO_DH(GEN8_DE_PIPE_IER(PIPE_A), D_BDW_PLUS, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2499

MMIO_DH(GEN8_DE_PIPE_IIR(PIPE_A), D_BDW_PLUS, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2502

MMIO_DH(GEN8_DE_PIPE_IMR(PIPE_B), D_BDW_PLUS, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2504

MMIO_DH(GEN8_DE_PIPE_IER(PIPE_B), D_BDW_PLUS, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2506

MMIO_DH(GEN8_DE_PIPE_IIR(PIPE_B), D_BDW_PLUS, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2509

MMIO_DH(GEN8_DE_PIPE_IMR(PIPE_C), D_BDW_PLUS, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2511

MMIO_DH(GEN8_DE_PIPE_IER(PIPE_C), D_BDW_PLUS, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2513

MMIO_DH(GEN8_DE_PIPE_IIR(PIPE_C), D_BDW_PLUS, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2516

MMIO_DH(GEN8_DE_PORT_IMR, D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2517

MMIO_DH(GEN8_DE_PORT_IER, D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2518

MMIO_DH(GEN8_DE_PORT_IIR, D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2520

MMIO_DH(GEN8_DE_MISC_IMR, D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2521

MMIO_DH(GEN8_DE_MISC_IER, D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2522

MMIO_DH(GEN8_DE_MISC_IIR, D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2524

MMIO_DH(GEN8_PCU_IMR, D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2525

MMIO_DH(GEN8_PCU_IER, D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2526

MMIO_DH(GEN8_PCU_IIR, D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler);

drivers/gpu/drm/i915/gvt/handlers.c

2528

MMIO_DH(GEN8_MASTER_IRQ, D_BDW_PLUS, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2531

MMIO_RING_DFH(RING_ACTHD_UDW, D_BDW_PLUS, 0,

drivers/gpu/drm/i915/gvt/handlers.c

2536

~REG_MASKED_FIELD_ENABLE(RESET_CTL_REQUEST_RESET), D_BDW_PLUS, NULL,

drivers/gpu/drm/i915/gvt/handlers.c

2541

MMIO_RING_DFH(RING_REG, D_BDW_PLUS, 0, NULL, elsp_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

2545

MMIO_RING_F(RING_REG, 8, F_RO, 0, ~0, D_BDW_PLUS,

drivers/gpu/drm/i915/gvt/handlers.c

2550

MMIO_RING_DFH(RING_REG, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2554

MMIO_RING_F(RING_REG, 48, F_RO, 0, ~0, D_BDW_PLUS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2558

MMIO_RING_DFH(RING_REG, D_BDW_PLUS, F_MODE_MASK, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2561

MMIO_DH(GEN6_PCODE_MAILBOX, D_BDW_PLUS, NULL, mailbox_write);

drivers/gpu/drm/i915/gvt/handlers.c

2564

MMIO_RING_F(RING_REG, 32, F_CMD_ACCESS, 0, 0, D_BDW_PLUS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2567

MMIO_RING_GM(RING_HWS_PGA, D_BDW_PLUS, NULL, hws_pga_write);

drivers/gpu/drm/i915/gvt/handlers.c

2569

MMIO_DFH(HDC_CHICKEN0, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2571

MMIO_DFH(GEN8_ROW_CHICKEN, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS,

drivers/gpu/drm/i915/gvt/handlers.c

2573

MMIO_DFH(GEN7_ROW_CHICKEN2, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS,

drivers/gpu/drm/i915/gvt/handlers.c

2575

MMIO_DFH(GEN8_UCGCTL6, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2579

MMIO_DFH(GEN8_L3SQCREG4, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2584

D_BDW_PLUS, NULL, force_nonpriv_write);

drivers/gpu/drm/i915/gvt/handlers.c

2590

MMIO_DFH(_MMIO(0xe194), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2591

MMIO_DFH(_MMIO(0xe188), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2592

MMIO_DFH(HALF_SLICE_CHICKEN2, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2593

MMIO_DFH(_MMIO(0x2580), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2597

MMIO_DFH(_MMIO(0xe220), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2598

MMIO_DFH(_MMIO(0xe230), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2599

MMIO_DFH(_MMIO(0xe240), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2600

MMIO_DFH(_MMIO(0xe260), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2601

MMIO_DFH(_MMIO(0xe270), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2602

MMIO_DFH(_MMIO(0xe280), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2603

MMIO_DFH(_MMIO(0xe2a0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2604

MMIO_DFH(_MMIO(0xe2b0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2605

MMIO_DFH(_MMIO(0xe2c0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2606

MMIO_DFH(_MMIO(0x21f0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);

drivers/gpu/drm/i915/gvt/handlers.c

2776

MMIO_DFH(_MMIO(0xe4cc), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);