DVSCNTR
intel_de_write_fw(display, DVSCNTR(pipe), dvscntr);
intel_de_write_fw(display, DVSCNTR(pipe), 0);
error->ctl = intel_de_read(display, DVSCNTR(crtc->pipe));
ret = intel_de_read(display, DVSCNTR(plane->pipe)) & DVS_ENABLE;