DTR
case PARAM_DTR: return CAST((scc->wreg[R5] & DTR)? 1:0);
wr(scc,R5,Tx8|DTR|TxCRC_ENAB); /* TX 8 bits/char, disabled, DTR */
ctrl.DTR = 1;
port->ctrl_ul.DTR = dtr;
| (ctrl_ul->DTR ? TIOCM_DTR : 0)
unsigned int DTR:1;
unsigned int DTR:1;
set_bits |= DTR;
clear_bits |= DTR;
uap->curregs[R5] |= DTR;
uap->curregs[R5] &= ~DTR;
write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR);
set_bits |= DTR;
clear_bits |= DTR;
uap->curregs[R5] |= DTR;
uap->curregs[R5] |= DTR;
uap->curregs[R5] &= ~DTR;
set_bits |= DTR;
clear_bits |= DTR;
zport_a->regs[5] |= DTR;
zport_a->regs[5] &= ~DTR;