drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1812

if (active_irqs & DSP_HOLD_VALID_INTR) {

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

1814

active_irqs &= ~DSP_HOLD_VALID_INTR;

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

495

VOP_INTR_SET_TYPE(vop, clear, DSP_HOLD_VALID_INTR, 1);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

496

VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 1);

drivers/gpu/drm/rockchip/rockchip_drm_vop.c

510

VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 0);

drivers/gpu/drm/rockchip/rockchip_drm_vop.h

248

#define INTR_MASK (DSP_HOLD_VALID_INTR | FS_INTR | \

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

161

DSP_HOLD_VALID_INTR,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

258

DSP_HOLD_VALID_INTR,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

495

DSP_HOLD_VALID_INTR,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

603

DSP_HOLD_VALID_INTR,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

750

DSP_HOLD_VALID_INTR,

drivers/gpu/drm/rockchip/rockchip_vop_reg.c

790

DSP_HOLD_VALID_INTR,