DSP_BAR
ipcx = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IPCX);
ipcd = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IPCD);
snd_sof_dsp_update_bits64_unlocked(sdev, DSP_BAR,
snd_sof_dsp_update_bits64_unlocked(sdev, DSP_BAR,
ipcx = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IPCX);
ipcd = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IPCD);
snd_sof_dsp_update_bits64_unlocked(sdev, DSP_BAR, SHIM_IMRX,
snd_sof_dsp_write64(sdev, DSP_BAR, SHIM_IPCX, SHIM_BYT_IPCX_BUSY);
snd_sof_dsp_update_bits64_unlocked(sdev, DSP_BAR, SHIM_IPCD,
snd_sof_dsp_update_bits64_unlocked(sdev, DSP_BAR, SHIM_IMRX,
snd_sof_dsp_update_bits64_unlocked(sdev, DSP_BAR, SHIM_IPCX,
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_CSR,
if (!(snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_CSR) &
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_CSR,
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_CSR,
status = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IPCD);
panic = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IPCX);
imrx = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IMRX);
imrd = snd_sof_dsp_read64(sdev, DSP_BAR, SHIM_IMRD);
sdev->bar[DSP_BAR] = devm_ioremap(sdev->dev, base, size);
if (!sdev->bar[DSP_BAR]) {
dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[DSP_BAR]);
sdev->mmio_bar = DSP_BAR;
sdev->mailbox_bar = DSP_BAR;
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX,
{"dmac0", DSP_BAR, DMAC0_OFFSET, DMAC_SIZE,
{"dmac1", DSP_BAR, DMAC1_OFFSET, DMAC_SIZE,
{"ssp0", DSP_BAR, SSP0_OFFSET, SSP_SIZE,
{"ssp1", DSP_BAR, SSP1_OFFSET, SSP_SIZE,
{"ssp2", DSP_BAR, SSP2_OFFSET, SSP_SIZE,
{"iram", DSP_BAR, IRAM_OFFSET, IRAM_SIZE,
{"dram", DSP_BAR, DRAM_OFFSET, DRAM_SIZE,
{"shim", DSP_BAR, SHIM_OFFSET, SHIM_SIZE_BYT,
{"dmac0", DSP_BAR, DMAC0_OFFSET, DMAC_SIZE,
{"dmac1", DSP_BAR, DMAC1_OFFSET, DMAC_SIZE,
{"dmac2", DSP_BAR, DMAC2_OFFSET, DMAC_SIZE,
{"ssp0", DSP_BAR, SSP0_OFFSET, SSP_SIZE,
{"ssp1", DSP_BAR, SSP1_OFFSET, SSP_SIZE,
{"ssp2", DSP_BAR, SSP2_OFFSET, SSP_SIZE,
{"ssp3", DSP_BAR, SSP3_OFFSET, SSP_SIZE,
{"ssp4", DSP_BAR, SSP4_OFFSET, SSP_SIZE,
{"ssp5", DSP_BAR, SSP5_OFFSET, SSP_SIZE,
{"iram", DSP_BAR, IRAM_OFFSET, IRAM_SIZE,
{"dram", DSP_BAR, DRAM_OFFSET, DRAM_SIZE,
{"shim", DSP_BAR, SHIM_OFFSET, SHIM_SIZE_CHT,
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX, 0x3, 0x3);
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRD, 0x3, 0x3);
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_CSR,
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX,
snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX,
{"dmac0", DSP_BAR, DMAC0_OFFSET, DMAC_SIZE,
{"dmac1", DSP_BAR, DMAC1_OFFSET, DMAC_SIZE,
{"ssp0", DSP_BAR, SSP0_OFFSET, SSP_SIZE,
{"ssp1", DSP_BAR, SSP1_OFFSET, SSP_SIZE,
{"ssp2", DSP_BAR, SSP2_OFFSET, SSP_SIZE,
{"iram", DSP_BAR, IRAM_OFFSET, IRAM_SIZE,
{"dram", DSP_BAR, DRAM_OFFSET, DRAM_SIZE,
{"shim", DSP_BAR, SHIM_OFFSET, SHIM_SIZE_BYT,
sdev->bar[DSP_BAR] = devm_ioremap(sdev->dev, base, size);
if (!sdev->bar[DSP_BAR]) {
dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[DSP_BAR]);