DSPFW3
regs->cdv.saveDSPFW[2] = REG_READ(DSPFW3);
REG_WRITE(DSPFW3, regs->cdv.saveDSPFW[2]);
REG_WRITE(DSPFW3, 0x36000000);
REG_WRITE(DSPFW3, 0x24000000);
REG_WRITE(DSPFW3, 0x0);
regs->psb.saveDSPFW3 = PSB_RVDC32(DSPFW3);
PSB_WVDC32(regs->psb.saveDSPFW3, DSPFW3);
regs->saveDSPFW3 = PSB_RVDC32(DSPFW3);
PSB_WVDC32(regs->saveDSPFW3, DSPFW3);
val = intel_de_read(display, DSPFW3(display));
intel_de_write(display, DSPFW3(display), val);
intel_de_posting_read(display, DSPFW3(display));
intel_de_write(display, DSPFW3(display),
tmp = intel_de_read(display, DSPFW3(display));
tmp = intel_de_read(display, DSPFW3(display));
intel_de_rmw(display, DSPFW3(display),
intel_de_rmw(display, DSPFW3(display),
reg = intel_de_read(display, DSPFW3(display));
intel_de_write(display, DSPFW3(display), reg);
intel_de_write(display, DSPFW3(display),
intel_de_write(display, DSPFW3(display),
sr_enabled = intel_de_read(display, DSPFW3(display)) & PINEVIEW_SELF_REFRESH_EN;