arch/powerpc/kvm/book3s_64_mmu_hv.c

550

dsisr & DSISR_ISSTORE);

arch/powerpc/kvm/book3s_64_mmu_hv.c

586

dsisr & DSISR_ISSTORE);

arch/powerpc/kvm/book3s_64_mmu_hv.c

601

writing = (dsisr & DSISR_ISSTORE) != 0;

arch/powerpc/kvm/book3s_64_mmu_radix.c

933

bool writing = !!(dsisr & DSISR_ISSTORE);

arch/powerpc/kvm/book3s_64_mmu_radix.c

983

ea, DSISR_ISSTORE | DSISR_PROTFAULT);

arch/powerpc/kvm/book3s_emulate.c

470

dsisr = DSISR_ISSTORE;

arch/powerpc/kvm/book3s_hv.c

1849

vcpu->arch.fault_dsisr |= DSISR_ISSTORE;

arch/powerpc/kvm/book3s_hv.c

2046

vcpu->arch.fault_dsisr |= DSISR_ISSTORE;

arch/powerpc/kvm/book3s_hv_nested.c

1401

u64 fault_addr, flags = dsisr & DSISR_ISSTORE;

arch/powerpc/kvm/book3s_hv_nested.c

1426

if (dsisr & DSISR_ISSTORE) {

arch/powerpc/kvm/book3s_hv_nested.c

1465

bool writing = !!(dsisr & DSISR_ISSTORE);

arch/powerpc/kvm/book3s_hv_nested.c

1537

bool writing = !!(dsisr & DSISR_ISSTORE);

arch/powerpc/kvm/book3s_hv_nested.c

1614

ea, DSISR_ISSTORE | DSISR_PROTFAULT);

arch/powerpc/kvm/book3s_hv_rm_mmu.c

1248

} else if (status & DSISR_ISSTORE) {

arch/powerpc/kvm/book3s_hv_rm_mmu.c

1260

if (status & DSISR_ISSTORE)

arch/powerpc/kvm/book3s_pr.c

694

if (data && (vcpu->arch.fault_dsisr & DSISR_ISSTORE))

arch/powerpc/kvm/book3s_pr.c

754

flags |= vcpu->arch.fault_dsisr & DSISR_ISSTORE;

arch/powerpc/kvm/powerpc.c

322

dsisr |= DSISR_ISSTORE;

arch/powerpc/mm/book3s64/hash_utils.c

1980

if (dsisr & DSISR_ISSTORE)

arch/powerpc/mm/copro_fault.c

39

is_write = dsisr & DSISR_ISSTORE;

arch/powerpc/mm/fault.c

375

#define page_fault_is_write(__err) ((__err) & DSISR_ISSTORE)