drivers/gpu/drm/amd/amdgpu/atombios_dp.c

233

voltage_names[(v & DP_TRAIN_VOLTAGE_SWING_MASK) >> DP_TRAIN_VOLTAGE_SWING_SHIFT],

drivers/gpu/drm/amd/amdgpu/atombios_dp.c

638

if ((dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) {

drivers/gpu/drm/amd/amdgpu/atombios_dp.c

647

voltage = dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;

drivers/gpu/drm/amd/amdgpu/atombios_dp.c

660

dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK,

drivers/gpu/drm/amd/amdgpu/atombios_dp.c

713

dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK,

drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c

590

vs = (training_lane & DP_TRAIN_VOLTAGE_SWING_MASK) >>

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

1082

same_volt = (before_cr[i] & DP_TRAIN_VOLTAGE_SWING_MASK) ==

drivers/gpu/drm/gma500/cdv_intel_dp.c

1410

vswing = (signal_level & DP_TRAIN_VOLTAGE_SWING_MASK);

drivers/gpu/drm/gma500/cdv_intel_dp.c

1536

if ((intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) {

drivers/gpu/drm/gma500/cdv_intel_dp.c

1542

voltage = intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;

drivers/gpu/drm/hisilicon/hibmc/dp/dp_serdes.c

22

cfg[i] = serdes_tx_cfg[FIELD_GET(DP_TRAIN_VOLTAGE_SWING_MASK, train_set[i])]

drivers/gpu/drm/i915/display/g4x_dp.c

1053

u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |

drivers/gpu/drm/i915/display/g4x_dp.c

1101

u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |

drivers/gpu/drm/i915/display/g4x_dp.c

834

switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {

drivers/gpu/drm/i915/display/g4x_dp.c

857

switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {

drivers/gpu/drm/i915/display/g4x_dp.c

876

switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {

drivers/gpu/drm/i915/display/g4x_dp.c

891

switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {

drivers/gpu/drm/i915/display/g4x_dp.c

919

switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {

drivers/gpu/drm/i915/display/g4x_dp.c

942

switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {

drivers/gpu/drm/i915/display/g4x_dp.c

960

switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {

drivers/gpu/drm/i915/display/g4x_dp.c

974

switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {

drivers/gpu/drm/i915/display/g4x_dp.c

996

switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {

drivers/gpu/drm/i915/display/intel_ddi.c

1144

DP_TRAIN_VOLTAGE_SWING_MASK;

drivers/gpu/drm/i915/display/intel_ddi.c

1499

u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |

drivers/gpu/drm/i915/display/intel_dp_link_training.c

584

((train_set) & DP_TRAIN_VOLTAGE_SWING_MASK) >> DP_TRAIN_VOLTAGE_SWING_SHIFT, \

drivers/gpu/drm/i915/display/intel_dp_link_training.c

681

u8 v = (train_set_lane & DP_TRAIN_VOLTAGE_SWING_MASK) >>

drivers/gpu/drm/radeon/atombios_dp.c

282

voltage_names[(v & DP_TRAIN_VOLTAGE_SWING_MASK) >> DP_TRAIN_VOLTAGE_SWING_SHIFT],

drivers/gpu/drm/radeon/atombios_dp.c

700

if ((dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) {

drivers/gpu/drm/radeon/atombios_dp.c

709

voltage = dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;

drivers/gpu/drm/radeon/atombios_dp.c

721

dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK,

drivers/gpu/drm/radeon/atombios_dp.c

772

dp_info->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK,

drivers/gpu/drm/xlnx/zynqmp_dp.c

2057

*val = dp->test.train_set[priv->lane] & DP_TRAIN_VOLTAGE_SWING_MASK;

drivers/gpu/drm/xlnx/zynqmp_dp.c

2072

DP_TRAIN_VOLTAGE_SWING_MASK);

drivers/gpu/drm/xlnx/zynqmp_dp.c

739

opts.dp.voltage[0] = (train & DP_TRAIN_VOLTAGE_SWING_MASK)

drivers/gpu/drm/xlnx/zynqmp_dp.c

800

if ((dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == vs)

drivers/gpu/drm/xlnx/zynqmp_dp.c

808

vs = dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;