drivers/gpu/drm/i915/display/intel_ddi.c

2282

return DP_TP_CTL(encoder->port);

drivers/gpu/drm/i915/display/intel_fdi.c

892

intel_de_write(display, DP_TP_CTL(PORT_E),

drivers/gpu/drm/i915/display/intel_fdi.c

953

intel_de_rmw(display, DP_TP_CTL(PORT_E), DP_TP_CTL_ENABLE, 0);

drivers/gpu/drm/i915/display/intel_fdi.c

954

intel_de_posting_read(display, DP_TP_CTL(PORT_E));

drivers/gpu/drm/i915/display/intel_fdi.c

966

intel_de_write(display, DP_TP_CTL(PORT_E),

drivers/gpu/drm/i915/gvt/handlers.c

2381

MMIO_DH(DP_TP_CTL(PORT_A), D_ALL, NULL, dp_tp_ctl_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

2382

MMIO_DH(DP_TP_CTL(PORT_B), D_ALL, NULL, dp_tp_ctl_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

2383

MMIO_DH(DP_TP_CTL(PORT_C), D_ALL, NULL, dp_tp_ctl_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

2384

MMIO_DH(DP_TP_CTL(PORT_D), D_ALL, NULL, dp_tp_ctl_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

2385

MMIO_DH(DP_TP_CTL(PORT_E), D_ALL, NULL, dp_tp_ctl_mmio_write);

drivers/gpu/drm/i915/gvt/handlers.c

843

u32 tx_ctl = vgpu_vreg_t(vgpu, DP_TP_CTL(PORT_E));

drivers/gpu/drm/i915/gvt/handlers.c

963

calc_index(offset, DP_TP_CTL(PORT_A), DP_TP_CTL(PORT_B), DP_TP_CTL(PORT_E))

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

542

MMIO_D(DP_TP_CTL(PORT_A));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

543

MMIO_D(DP_TP_CTL(PORT_B));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

544

MMIO_D(DP_TP_CTL(PORT_C));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

545

MMIO_D(DP_TP_CTL(PORT_D));

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

546

MMIO_D(DP_TP_CTL(PORT_E));