drivers/gpu/drm/nouveau/include/nvhw/drf.h

28

#define DRF_BITS(drf) (DRF_HI(drf) - DRF_LO(drf) + 1)

drivers/gpu/drm/nouveau/include/nvhw/drf.h

30

#define DRF_SMASK(drf) (DRF_MASK(drf) << DRF_LO(drf))

drivers/gpu/drm/nouveau/include/nvhw/drf.h

39

#define DRF_LW_IDX(o,drf) (DRF_LO(DRF_MW(drf)) / DRF_MW_SIZE(o))

drivers/gpu/drm/nouveau/include/nvhw/drf.h

40

#define DRF_LW_LO(o,drf) (DRF_LO(DRF_MW(drf)) % DRF_MW_SIZE(o))

drivers/gpu/drm/nouveau/include/nvhw/drf.h

62

#define NVVAL_X(drf,v) (((v) & DRF_MASK(drf)) << DRF_LO(drf))

drivers/gpu/drm/nouveau/include/nvhw/drf.h

73

#define NVVAL_GET_X(o,drf) (((o) >> DRF_LO(drf)) & DRF_MASK(drf))

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gb100.c

15

const u32 hshub = DRF_LO(NV_PFB_HSHUB0);

drivers/gpu/drm/nouveau/nvkm/subdev/pci/gh100.c

19

.addr = DRF_LO(NV_EP_PCFGM),

drivers/gpu/drm/nouveau/nvkm/subdev/pci/gh100.c

20

.size = DRF_HI(NV_EP_PCFGM) - DRF_LO(NV_EP_PCFGM) + 1,