drivers/gpu/drm/display/drm_dp_helper.c

303

if (dp_phy == DP_PHY_DPRX) {

drivers/gpu/drm/display/drm_dp_helper.c

431

[DP_PHY_DPRX] = "DPRX",

drivers/gpu/drm/display/drm_dp_helper.c

836

if (dp_phy == DP_PHY_DPRX)

drivers/gpu/drm/i915/display/g4x_dp.c

664

DP_PHY_DPRX, DP_TRAINING_PATTERN_1);

drivers/gpu/drm/i915/display/intel_dp.c

5696

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp.c

5828

err = drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

108

lt_dbg(intel_dp, DP_PHY_DPRX, "LTTPR common capabilities: %*ph\n",

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1135

if (drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1137

lt_err(intel_dp, DP_PHY_DPRX, "Failed to get link status\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1147

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1148

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1155

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1156

lt_dbg(intel_dp, DP_PHY_DPRX, "Channel EQ check failed. cannot continue POST_LT_ADJ_REQ\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1162

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1163

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1170

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1171

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1178

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1179

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1186

if (drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1188

lt_err(intel_dp, DP_PHY_DPRX, "Failed to get link status\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1193

if (intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX, link_status)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1197

if (!intel_dp_update_link_train(intel_dp, crtc_state, DP_PHY_DPRX)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1198

lt_err(intel_dp, DP_PHY_DPRX, "Failed to update link training\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1243

lt_dbg(intel_dp, DP_PHY_DPRX, "Failed to read sink status\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1275

intel_dp_program_link_training_pattern(intel_dp, crtc_state, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1283

lt_dbg(intel_dp, DP_PHY_DPRX, "128b/132b intra-hop not clearing\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1446

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1457

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1462

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1480

lt_dbg(intel_dp, DP_PHY_DPRX, "Link Training failed on disconnected sink.\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1485

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1518

ret = intel_dp_link_train_phy(intel_dp, crtc_state, DP_PHY_DPRX);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1520

intel_dp_disable_dpcd_training_pattern(intel_dp, DP_PHY_DPRX);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1550

if (!intel_dp_reset_link_train(intel_dp, crtc_state, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1552

lt_err(intel_dp, DP_PHY_DPRX, "Failed to start 128b/132b TPS1\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1560

lt_err(intel_dp, DP_PHY_DPRX, "Failed to read TX FFE presets\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1565

intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1566

if (!intel_dp_update_link_train(intel_dp, crtc_state, DP_PHY_DPRX)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1567

lt_err(intel_dp, DP_PHY_DPRX, "Failed to set initial TX FFE settings\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1572

if (!intel_dp_set_link_train(intel_dp, crtc_state, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1574

lt_err(intel_dp, DP_PHY_DPRX, "Failed to start 128b/132b TPS2\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1585

lt_err(intel_dp, DP_PHY_DPRX, "Failed to read link status\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1590

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1591

lt_err(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1597

lt_dbg(intel_dp, DP_PHY_DPRX, "Lane channel eq done\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1602

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1603

lt_err(intel_dp, DP_PHY_DPRX, "Lane channel eq timeout\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1616

intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1619

if (!intel_dp_update_link_train(intel_dp, crtc_state, DP_PHY_DPRX)) {

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1620

lt_err(intel_dp, DP_PHY_DPRX, "Failed to update TX FFE settings\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1626

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1627

lt_err(intel_dp, DP_PHY_DPRX, "Max loop count reached\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1636

lt_err(intel_dp, DP_PHY_DPRX, "Failed to read link status\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1641

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1642

lt_err(intel_dp, DP_PHY_DPRX, "Downstream link training failure\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1647

lt_dbg(intel_dp, DP_PHY_DPRX, "Interlane align done\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1652

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1653

lt_err(intel_dp, DP_PHY_DPRX, "Interlane align timeout\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1676

lt_err(intel_dp, DP_PHY_DPRX, "Failed to start 128b/132b TPS2 CDS\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1692

lt_err(intel_dp, DP_PHY_DPRX, "Failed to read link status\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1699

lt_dbg(intel_dp, DP_PHY_DPRX, "CDS interlane align done\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1704

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1705

lt_err(intel_dp, DP_PHY_DPRX, "Downstream link training failure\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1710

intel_dp_dump_link_status(intel_dp, DP_PHY_DPRX, link_status);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1711

lt_err(intel_dp, DP_PHY_DPRX, "CDS timeout\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1734

lt_err(intel_dp, DP_PHY_DPRX, "128b/132b intra-hop not clear\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1742

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1758

DP_PHY_DPRX, DP_TRAINING_PATTERN_2);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1760

intel_dp_disable_dpcd_training_pattern(intel_dp, DP_PHY_DPRX);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1808

lt_dbg(intel_dp, DP_PHY_DPRX, "Forcing link training failure\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

182

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1829

lt_dbg(intel_dp, DP_PHY_DPRX, "Ignore the link failure\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1842

lt_err(intel_dp, DP_PHY_DPRX, "Can't reduce link training parameters after failure\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1844

lt_dbg(intel_dp, DP_PHY_DPRX, "Can't reduce link training parameters after forced failure\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1864

lt_dbg(intel_dp, DP_PHY_DPRX, "DP2.0 SDP CRC16 for 128b/132b enabled\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

332

lttpr_count <= 0 && dp_phy != DP_PHY_DPRX);

drivers/gpu/drm/i915/display/intel_dp_link_training.c

526

return dp_phy == DP_PHY_DPRX ?

drivers/gpu/drm/i915/display/intel_dp_link_training.c

649

int reg = dp_phy == DP_PHY_DPRX ?

drivers/gpu/drm/i915/display/intel_dp_link_training.c

813

sink_tps4 = dp_phy != DP_PHY_DPRX ||

drivers/gpu/drm/i915/display/intel_dp_link_training.c

831

sink_tps3 = dp_phy != DP_PHY_DPRX ||

drivers/gpu/drm/i915/display/intel_dp_link_training.c

852

intel_dp_training_pattern(intel_dp, crtc_state, DP_PHY_DPRX) != DP_TRAINING_PATTERN_4;

drivers/gpu/drm/i915/display/intel_dp_link_training.c

894

lt_dbg(intel_dp, DP_PHY_DPRX, "Reloading eDP link rates\n");

drivers/gpu/drm/i915/display/intel_dp_link_training.c

901

lt_dbg(intel_dp, DP_PHY_DPRX, "Using LINK_BW_SET value %02x\n",

drivers/gpu/drm/i915/display/intel_dp_link_training.c

904

lt_dbg(intel_dp, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_test.c

314

if (drm_dp_dpcd_read_phy_link_status(&intel_dp->aux, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_test.c

321

intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX,

drivers/gpu/drm/i915/display/intel_dp_test.c

324

intel_dp_set_signal_levels(intel_dp, crtc_state, DP_PHY_DPRX);

drivers/gpu/drm/msm/dp/dp_ctrl.c

1362

if (dp_phy == DP_PHY_DPRX)

drivers/gpu/drm/msm/dp/dp_ctrl.c

1388

if (dp_phy == DP_PHY_DPRX)

drivers/gpu/drm/msm/dp/dp_ctrl.c

1666

ret = msm_dp_ctrl_link_train_1_2(ctrl, training_step, DP_PHY_DPRX);

drivers/gpu/drm/msm/dp/dp_ctrl.c

2011

msm_dp_ctrl_clear_training_pattern(ctrl, DP_PHY_DPRX);

drivers/gpu/drm/msm/dp/dp_ctrl.c

2118

msm_dp_ctrl_update_phy_vx_px(ctrl, DP_PHY_DPRX);

drivers/gpu/drm/msm/dp/dp_ctrl.c

2360

msm_dp_ctrl_clear_training_pattern(ctrl, DP_PHY_DPRX);

drivers/gpu/drm/msm/dp/dp_ctrl.c

2384

msm_dp_ctrl_clear_training_pattern(ctrl, DP_PHY_DPRX);

drivers/gpu/drm/msm/dp/dp_ctrl.c

2523

msm_dp_ctrl_clear_training_pattern(ctrl, DP_PHY_DPRX);

drivers/gpu/drm/nouveau/nouveau_dp.c

347

ret = drm_dp_dpcd_read_phy_link_status(aux, DP_PHY_DPRX, stat);

drivers/gpu/drm/nouveau/nouveau_dp.c

364

ret = drm_dp_dpcd_read_phy_link_status(aux, DP_PHY_DPRX, stat);

drivers/gpu/drm/nouveau/nouveau_dp.c

457

if (drm_dp_dpcd_read_phy_link_status(&outp->conn->aux, DP_PHY_DPRX, link_status) < 0)