drivers/gpu/drm/amd/amdgpu/atombios_dp.c

535

drm_dp_dpcd_writeb(dp_info->aux, DP_TRAINING_PATTERN_SET, tp);

drivers/gpu/drm/amd/amdgpu/atombios_dp.c

575

DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/amd/amdgpu/atombios_dp.c

588

DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

845

core_link_read_dpcd(link, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c

849

core_link_write_dpcd(link, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1081

DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1087

DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1236

dpcd_base_lt_offset = DP_TRAINING_PATTERN_SET;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1251

dpcd_lt_buffer[DP_TRAINING_PATTERN_SET - DP_TRAINING_PATTERN_SET]

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1280

&dpcd_lt_buffer[DP_TRAINING_LANE0_SET - DP_TRAINING_PATTERN_SET],

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c

1327

DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

240

uint32_t dpcd_tps_offset = DP_TRAINING_PATTERN_SET;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

831

uint32_t dpcd_tps_offset = DP_TRAINING_PATTERN_SET;

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c

947

uint32_t dpcd_tps_offset = DP_TRAINING_PATTERN_SET;

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

221

ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

278

retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

405

retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

766

ret = drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

770

ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

775

ret = drm_dp_dpcd_readb(&dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/analogix/analogix_dp_core.c

779

ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

1251

drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

1282

drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

812

drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

852

drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

993

drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/ite-it6505.c

1447

it6505_dpcd_write(it6505, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/ite-it6505.c

1884

it6505_dpcd_write(it6505, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/ite-it6505.c

1940

it6505_dpcd_write(it6505, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/ite-it6505.c

1954

it6505_dpcd_write(it6505, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/ite-it6505.c

1972

it6505_dpcd_write(it6505, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/ite-it6505.c

2000

it6505_dpcd_write(it6505, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/synopsys/dw-dp.c

720

ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/bridge/tc358767.c

1311

ret = drm_dp_dpcd_writeb(aux, DP_TRAINING_PATTERN_SET, tmp[0]);

drivers/gpu/drm/display/drm_dp_helper.c

3317

err = drm_dp_dpcd_write_byte(aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/display/drm_dp_helper.c

754

ret = drm_dp_dpcd_probe(aux, DP_TRAINING_PATTERN_SET);

drivers/gpu/drm/gma500/cdv_intel_dp.c

1364

DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/gma500/cdv_intel_dp.c

1636

DP_TRAINING_PATTERN_SET, DP_TRAINING_PATTERN_DISABLE);

drivers/gpu/drm/hisilicon/hibmc/dp/dp_link.c

99

ret = drm_dp_dpcd_write(dp->aux, DP_TRAINING_PATTERN_SET, &buf, sizeof(buf));

drivers/gpu/drm/i915/display/intel_dp_link_training.c

1538

if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/i915/display/intel_dp_link_training.c

525

DP_TRAINING_PATTERN_SET :

drivers/gpu/drm/i915/gvt/handlers.c

1279

if (p == DP_TRAINING_PATTERN_SET)

drivers/gpu/drm/mediatek/mtk_dp.c

1595

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_PATTERN_SET, aux_offset);

drivers/gpu/drm/mediatek/mtk_dp.c

1687

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/mediatek/mtk_dp.c

1723

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/mediatek/mtk_dp.c

1732

drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/msm/dp/dp_ctrl.c

1389

reg = DP_TRAINING_PATTERN_SET;

drivers/gpu/drm/radeon/atombios_dp.c

592

drm_dp_dpcd_writeb(dp_info->aux, DP_TRAINING_PATTERN_SET, tp);

drivers/gpu/drm/radeon/atombios_dp.c

635

DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/radeon/atombios_dp.c

647

DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/tegra/dp.c

449

err = drm_dp_dpcd_writeb(aux, DP_TRAINING_PATTERN_SET, pattern);

drivers/gpu/drm/xlnx/zynqmp_dp.c

1860

ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, dpcd_train);

drivers/gpu/drm/xlnx/zynqmp_dp.c

772

ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/xlnx/zynqmp_dp.c

842

ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,

drivers/gpu/drm/xlnx/zynqmp_dp.c

966

ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET,